Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK Data Sheet

 680

SAM9M10 [DATASHEET]

6355F–ATARM–12-Mar-13

The following flowchart (

) shows how to manage read multiple block and write multiple block transfers

with the DMA Controller. Polling or interrupt method can be used to wait for the end of write according to the con-
tents of the Interrupt Mask Register (HSMCI_IMR).

Read Multiple Block and Write Multiple Block 

Notes:

1. It is assumed that this command has been correctly sent (see 

).

2. Handle errors reported in HSMCI_SR.

Send  SELECT/DESELECT_CARD

command

(1)

  to select the card

Send SET_BLOCKLEN command

(1)

 

Set the block length
HSMCI_MR |= (BlockLength << 16)
Set the DMAEN bit
HSMCI_DMA |= DMAEN

Configure the HDMA channel X
DMAC_SADDRX and DMAC_DADDRX
DMAC_BTSIZE = BlockLength/4

Send WRITE_MULTIPLE_BLOCK or

READ_MULTIPLE_BLOCK command

(1)

Read status register DMAC_EBCISR

and Poll Bit CBTC[X]

New Buffer 

(2)

No

DMAC_CHEN[X] = TRUE

Poll the bit

XFRDONE = 1

No

RETURN

Yes

Send STOP_TRANSMISSION

command

(1)

Yes

Read status register HSMCI_SR

and Poll Bit FIFOEMPTY