Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK Data Sheet
Product codes
AT91SAM9M10-G45-EK
696
SAM9M10 [DATASHEET]
6355F–ATARM–12-Mar-13
35.13 MultiMedia Card Interface (MCI) User Interface
Note:
1. The response register can be read by N accesses at the same HSMCI_RSPR or at consecutive addresses (0x20 to 0x2C).
N depends on the size of the response.
Table 35-8.
Register Mapping
Offset
Register
Name
Access
Reset
0x00
Control Register
HSMCI_CR
Write
–
0x04
Mode Register
HSMCI_MR
Read-write
0x0
0x08
Data Timeout Register
HSMCI_DTOR
Read-write
0x0
0x0C
SD/SDIO Card Register
HSMCI_SDCR
Read-write
0x0
0x10
Argument Register
HSMCI_ARGR
Read-write
0x0
0x14
Command Register
HSMCI_CMDR
Write
–
0x18
Block Register
HSMCI_BLKR
Read-write
0x0
0x1C
Completion Signal Timeout Register
HSMCI_CSTOR
Read-write
0x0
0x20
HSMCI_RSPR
Read
0x0
0x24
HSMCI_RSPR
Read
0x0
0x28
HSMCI_RSPR
Read
0x0
0x2C
HSMCI_RSPR
Read
0x0
0x30
Receive Data Register
HSMCI_RDR
Read
0x0
0x34
Transmit Data Register
HSMCI_TDR
Write
–
0x38 - 0x3C
Reserved
–
–
–
0x40
Status Register
HSMCI_SR
Read
0xC0E5
0x44
Interrupt Enable Register
HSMCI_IER
Write
–
0x48
Interrupt Disable Register
HSMCI_IDR
Write
–
0x4C
Interrupt Mask Register
HSMCI_IMR
Read
0x0
0x50
DMA Configuration Register
HSMCI_DMA
Read-write
0x00
0x54
Configuration Register
HSMCI_CFG
Read-write
0x00
0x58-0xE0
Reserved
–
–
–
0xE4
Write Protection Mode Register
HSMCI_WPMR
Read-write
–
0xE8
Write Protection Status Register
HSMCI_WPSR
Read-only
–
0xEC - 0xFC
Reserved
–
–
–
0x100-0x124
Reserved
–
–
–
0x200-0x3FFC
FIFO Memory Aperture
HSMCI_FIFO
Read-write
0x0