Atmel Evaluation Kit AT91SAM9G25-EK AT91SAM9G25-EK Data Sheet

Product codes
AT91SAM9G25-EK
Page of 1165
292
SAM9G25 [DATASHEET]
11032D–ATARM–10-Mar-2014
When both the Shift Register and the DBGU_THR are empty, i.e., all the characters written in DBGU_THR have been 
processed, the bit TXEMPTY rises after the last stop bit has been completed.
Figure 24-11.Transmitter Control 
24.5.4 DMA Support
Both the receiver and the transmitter of the Debug Unit’s UART are connected to a DMA Controller (DMAC) channel. 
The DMA Controller channels are programmed via registers that are mapped within the DMAC user interface. 
24.5.5 Test Modes
The Debug Unit supports three tests modes. These modes of operation are programmed by using the field CHMODE 
(Channel Mode) in the mode register DBGU_MR. 
The Automatic Echo mode allows bit-by-bit retransmission. When a bit is received on the DRXD line, it is sent to the 
DTXD line. The transmitter operates normally, but has no effect on the DTXD line.
The Local Loopback mode allows the transmitted characters to be received. DTXD and DRXD pins are not used and the 
output of the transmitter is internally connected to the input of the receiver. The DRXD pin level has no effect and the 
DTXD line is held high, as in idle state. 
The Remote Loopback mode directly connects the DRXD pin to the DTXD line. The transmitter and the receiver are 
disabled and have no effect. This mode allows a bit-by-bit retransmission.
DBGU_THR
Shift Register
DTXD
TXRDY
TXEMPTY
Data 0
Data 1
Data 0
Data 0
Data 1
Data 1
S
S
P
P
Write Data 0
in DBGU_THR
Write Data 1
in DBGU_THR
stop
stop