Atmel Evaluation Kit AT91SAM9G25-EK AT91SAM9G25-EK Data Sheet

Product codes
AT91SAM9G25-EK
Page of 1165
902
SAM9G25 [DATASHEET]
11032D–ATARM–10-Mar-2014
40.5
Product Dependencies
40.5.1 Power Management
The ADC Controller is not continuously clocked. The programmer must first enable the ADC Controller MCK in the Power 
Management Controller (PMC) before using the ADC Controller. However, if the application does not require ADC 
operations, the ADC Controller clock can be stopped when not needed and restarted when necessary. Configuring the 
ADC Controller does not require the ADC Controller clock to be enabled.
40.5.2 Interrupt Sources
The ADC interrupt line is connected on one of the internal sources of the Interrupt Controller. Using the ADC interrupt 
requires the interrupt controller to be programmed first.
40.5.3 Analog Inputs
The analog input pins can be multiplexed with PIO lines. In this case, the assignment of the ADC input is automatically 
done as soon as the corresponding channel is enabled by writing the register ADC_CHER. By default, after reset, the 
PIO line is configured as input with its pull-up enabled and the ADC input is connected to the GND.
40.5.4 I/O Lines
The pin ADTRG may be shared with other peripheral functions through the PIO Controller. In this case, the PIO 
Controller should be set accordingly to assign the pin ADTRG to the ADC function.
40.5.5 Timer Triggers
Timer Counters may or may not be used as hardware triggers depending on user requirements. Thus, some or all of the 
timer counters may be unconnected.
40.5.6 Conversion Performances
For performance and electrical characteristics of the ADC, please refer to the product DC Characteristics section.
Table 40-2. Peripheral IDs
Instance
ID
ADC
19
Table 40-3. I/O Lines
Instance
Signal
I/O Line
Peripheral
ADC
ADTRG
PB18
B
ADC
AD0
PB11
X1
ADC
AD1
PB12
X1
ADC
AD2
PB13
X1
ADC
AD3
PB14
X1
ADC
AD4
PB15
X1
ADC
AD5
PB16
X1
ADC
AD6
PB17
X1
ADC
AD7
PB6
X1
ADC
AD8
PB7
X1
ADC
AD9
PB8
X1
ADC
AD10
PB9
X1
ADC
AD11
PB10
X1