Atmel Xplained Pro Evaluation Kit ATSAMD20-XPRO ATSAMD20-XPRO Data Sheet

Product codes
ATSAMD20-XPRO
Page of 660
145
Atmel | SMART SAM D20 [DATASHEET]
Atmel-42129K–SAM-D20_datasheet–06/2014
z
Bit 3 – OSC8MRDY: OSC8M Ready Interrupt Enable
0: The OSC8M Ready interrupt is disabled. 
1: The OSC8M Ready interrupt is enabled, and an interrupt request will be generated when the OSC8M Ready 
Interrupt flag is set.
Writing a zero to this bit has no effect.
Writing a one to this bit will clear the OSC8M Ready Interrupt Enable bit, which disables the OSC8M Ready 
interrupt.
z
Bit 2 – OSC32KRDY: OSC32K Ready Interrupt Enable
0: The OSC32K Ready interrupt is disabled. 
1: The OSC32K Ready interrupt is enabled, and an interrupt request will be generated when the OSC32K Ready 
Interrupt flag is set.
Writing a zero to this bit has no effect.
Writing a one to this bit will clear the OSC32K Ready Interrupt Enable bit, which disables the OSC32K Ready 
interrupt.
z
Bit 1 – XOSC32KRDY: XOSC32K Ready Interrupt Enable
0: The XOSC32K Ready interrupt is disabled. 
1: The XOSC32K Ready interrupt is enabled, and an interrupt request will be generated when the XOSC32K 
Ready Interrupt flag is set.
Writing a zero to this bit has no effect.
Writing a one to this bit will clear the XOSC32K Ready Interrupt Enable bit, which disables the XOSC32K Ready 
interrupt.
z
Bit 0 – XOSCRDY: XOSC Ready Interrupt Enable
0: The XOSC Ready interrupt is disabled. 
1: The XOSC Ready interrupt is enabled, and an interrupt request will be generated when the XOSC Ready Inter-
rupt flag is set.
Writing a zero to this bit has no effect.
Writing a one to this bit will clear the XOSC Ready Interrupt Enable bit, which disables the XOSC Ready interrupt.