Atmel Xplained Pro Evaluation Kit ATSAMD20-XPRO ATSAMD20-XPRO Data Sheet
Product codes
ATSAMD20-XPRO
190
Atmel | SMART SAM D20 [DATASHEET]
Atmel-42129K–SAM-D20_datasheet–06/2014
17.8.4 Interrupt Enable Clear
This register allows the user to disable an interrupt without doing a read-modify-write operation. Changes in this register
will also be reflected in the Interrupt Enable Set register (INTENSET).
will also be reflected in the Interrupt Enable Set register (INTENSET).
Name:
INTENCLR
Offset:
0x4
Reset:
0x00
Property:
Write-Protected
z
Bits 7:1 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
z
Bit 0 – EW: Early Warning Interrupt Enable
0: The Early Warning interrupt is disabled.
0: The Early Warning interrupt is disabled.
1: The Early Warning interrupt is enabled.
Writing a zero to this bit has no effect.
Writing a one to this bit disables the Early Warning interrupt.
Writing a one to this bit disables the Early Warning interrupt.
Bit
7
6
5
4
3
2
1
0
EW
Access
R
R
R
R
R
R
R
R/W
Reset
0
0
0
0
0
0
0
0