Atmel Xplained Pro Evaluation Kit ATSAMD20-XPRO ATSAMD20-XPRO Data Sheet

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Atmel | SMART SAM D20 [DATASHEET]

Atmel-42129K–SAM-D20_datasheet–06/2014

z

Bits 7:4 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to 
zero when this register is written. These bits will always return zero when read.

z

Bits 3:2 – MODE[1:0]: Operating Mode
These bits define the operating mode of the RTC.

These bits are not synchronized.

z

Bit 1 – ENABLE: Enable
0: The peripheral is disabled or being disabled.

1: The peripheral is enabled or being enabled.

Due to synchronization, there is delay from writing CTRL.ENABLE until the peripheral is enabled/disabled. The 
value written to CTRL.ENABLE will read back immediately, and the Synchronization Busy bit in the Status register 
(STATUS.SYNCBUSY) will be set. STATUS.SYNCBUSY will be cleared when the operation is complete.

This bit is not enable-protected.

z

Bit 0 – SWRST: Software Reset
0: There is no reset operation ongoing.

1: The reset operation is ongoing.

Writing a zero to this bit has no effect. 

Writing a one to this bit resets all registers in the RTC, except DBGCTRL, to their initial state, and the RTC will be 
disabled. 

Writing a one to CTRL.SWRST will always take precedence, meaning that all other writes in the same write-oper-
ation will be discarded. 

Due to synchronization, there is a delay from writing CTRL.SWRST until the reset is complete. CTRL.SWRST and 
STATUS.SYNCBUSY will both be cleared when the reset is complete.

This bit is not enable-protected.

0x0

COUNT32

Mode 0: 32-bit Counter

0x1

COUNT16

Mode 1: 16-bit Counter

0x2

CLOCK

Mode 2: Clock/Calendar

0x3

-

Reserved