Atmel Xplained Pro Evaluation Kit ATSAMD20-XPRO ATSAMD20-XPRO Data Sheet
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Product codes
ATSAMD20-XPRO
387
Atmel | SMART SAM D20 [DATASHEET]
Atmel-42129K–SAM-D20_datasheet–06/2014
26.
SERCOM I
2
C – SERCOM Inter-Integrated Circuit
26.1
Overview
The inter-integrated circuit (I
2
C) interface is one of the available modes in the serial communication interface (SERCOM).
The I
2
C interface uses the SERCOM transmitter and receiver configured as shown in
. Fields shown in capital
letters are registers accessible by the CPU, while lowercase fields are internal to the SERCOM. Each side, master and
slave, depicts a separate I
slave, depicts a separate I
2
C interface containing a shift register, a transmit buffer and a receive buffer. In addition, the
I
2
C master uses the SERCOM baud-rate generator, while the I
2
C slave uses the SERCOM address match logic.
26.2
Features
z
Master or slave operation
z
Philips I
2
C compatible
z
SMBus
™
compatible
z
100kHz and 400kHz support at low system clock frequencies
z
Physical interface includes:
z
Slew-rate limited outputs
z
Filtered inputs
z
Slave operation:
z
Operation in all sleep modes
z
Wake-up on address match
z
Address match in hardware for:
z
7-bit unique address and/or 7-bit general call address
z
7-bit address range
z
Two unique 7-bit addresses
26.3
Block Diagram
Figure 26-1. I
2
C Single-Master Single-Slave Interconnection
shift register
shift register
Master
Slave
SDA
SCL
Tx DATA
Rx DATA
Tx DATA
Rx DATA
==
ADDR/ADDRMASK
BAUD
baud rate generator
SCL low hold
0
0
0
0