Atmel Xplained Pro Evaluation Kit ATSAMD20-XPRO ATSAMD20-XPRO Data Sheet
Product codes
ATSAMD20-XPRO
407
Atmel | SMART SAM D20 [DATASHEET]
Atmel-42129K–SAM-D20_datasheet–06/2014
Table 26-3. SDA Hold Time
These bits are not synchronized.
z
Bits 19:17 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
z
Bit 16 – PINOUT: Pin Usage
This bit sets the pin usage to either two- or four-wire operation:
This bit sets the pin usage to either two- or four-wire operation:
0: 4-wire operation disabled
1: 4-wire operation enabled
This bit is not synchronized.
z
Bits 15:8 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
z
Bit 7 – RUNSTDBY: Run in Standby
This bit defines the functionality in standby sleep mode.
This bit defines the functionality in standby sleep mode.
0: Disabled – All reception is dropped.
1: Wake on address match, if enabled.
This bit is not synchronized.
z
Bits 6:5 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
z
Bits 4:2 – MODE[2:0]: Operating Mode
These bits must be written to 0x04 to select the I
These bits must be written to 0x04 to select the I
2
C slave serial communication interface of the SERCOM.
These bits are not synchronized.
z
Bit 1 – ENABLE: Enable
0: The peripheral is disabled.
0: The peripheral is disabled.
1: The peripheral is enabled.
Due to synchronization, there is delay from writing CTRLA.ENABLE until the peripheral is enabled/disabled. The
value written to CTRL.ENABLE will read back immediately and the Synchronization Busy bit in the Status register
(STATUS.SYNCBUSY) will be set. STATUS.SYNCBUSY will be cleared when the operation is complete.
value written to CTRL.ENABLE will read back immediately and the Synchronization Busy bit in the Status register
(STATUS.SYNCBUSY) will be set. STATUS.SYNCBUSY will be cleared when the operation is complete.
This bit is not enable-protected.
z
Bit 0 – SWRST: Software Reset
0: There is no reset operation ongoing.
0: There is no reset operation ongoing.
1: The reset operation is ongoing.
Writing a zero to this bit has no effect.
Value
Name
Description
0x0
DIS
Disabled
0x1
75
50-100ns hold time
0x2
450
300-600ns hold time
0x3
600
400-800ns hold time