Atmel Xplained Pro Evaluation Kit ATSAMD20-XPRO ATSAMD20-XPRO Data Sheet
Product codes
ATSAMD20-XPRO
498
Atmel | SMART SAM D20 [DATASHEET]
Atmel-42129K–SAM-D20_datasheet–06/2014
z
Bits 23:20 – INPUTOFFSET[3:0]: Positive Mux Setting Offset
The pin scan is enabled when INPUTSCAN != 0. Writing these bits to a value other than zero causes the first con-
version triggered to be converted using a positive input equal to MUXPOS + INPUTOFFSET. Setting this register
to zero causes the first conversion to use a positive input equal to MUXPOS.
The pin scan is enabled when INPUTSCAN != 0. Writing these bits to a value other than zero causes the first con-
version triggered to be converted using a positive input equal to MUXPOS + INPUTOFFSET. Setting this register
to zero causes the first conversion to use a positive input equal to MUXPOS.
After a conversion, the INPUTOFFSET register will be incremented by one, causing the next conversion to be
done with the positive input equal to MUXPOS + INPUTOFFSET. The sum of MUXPOS and INPUTOFFSET gives
the input that is actually converted.
done with the positive input equal to MUXPOS + INPUTOFFSET. The sum of MUXPOS and INPUTOFFSET gives
the input that is actually converted.
z
Bits 19:16 – INPUTSCAN[3:0]: Number of Input Channels Included in Scan
This register gives the number of input sources included in the pin scan. The number of input sources included is
INPUTSCAN + 1. The input channels included are in the range from MUXPOS + INPUTOFFSET to MUXPOS +
INPUTOFFSET + INPUTSCAN.
This register gives the number of input sources included in the pin scan. The number of input sources included is
INPUTSCAN + 1. The input channels included are in the range from MUXPOS + INPUTOFFSET to MUXPOS +
INPUTOFFSET + INPUTSCAN.
The range of the scan mode must not exceed the number of input channels available on the device.
z
Bits 15:13 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
z
Bits 12:8 – MUXNEG[4:0]: Negative Mux Input Selection
These bits define the Mux selection for the negative ADC input.
These bits define the Mux selection for the negative ADC input.
shows the possible input selections.
Table 28-10. Gain Factor Selection
Value
Name
Description
0x0
1X
1x
0x1
2X
2x
0x2
4X
4x
0x3
8X
8x
0x4
16X
16x
0x5-0xE
–
Reserved
0xF
DIV2
1/2x
Table 28-11. Negative Mux Input Selection
Value
Name
Description
0x00
PIN0
ADC AIN0 pin
0x01
PIN1
ADC AIN1 pin