Atmel Xplained Pro Evaluation Kit ATSAMD20-XPRO ATSAMD20-XPRO Data Sheet

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Atmel | SMART SAM D20 [DATASHEET]

Atmel-42129K–SAM-D20_datasheet–06/2014

of the comparator outputs. The interrupt mode is set by the Interrupt Selection bit group in the Comparator Control 
register (COMPCTRLx.INTSEL). Events are generated using the comparator output state, regardless of whether the 
interrupt is enabled or not.

Continuous measurement is selected by writing COMPCTRLx.SINGLE to zero. In continuous mode, the comparator is 
continuously enabled and performing comparisons. This ensures that the result of the latest comparison is always 
available in the Current State bit in the Status A register (STATUSA.STATEx). After the start-up time has passed, a 
comparison is done and STATUSA is updated. The Comparator x Ready bit in the Status B register 
(STATUSB.READYx) is set, and the appropriate peripheral events and interrupts are also generated. New comparisons 
are performed continuously until the COMPCTRLx.ENABLE bit is written to zero. The start-up time applies only to the 
first comparison.

In continuous operation, edge detection of the comparator output for interrupts is done by comparing the current and 
previous sample. The sampling rate is the GCLK_AC_DIG frequency. An example of continuous measurement is shown 
in 

.

For low-power operation, comparisons can be performed during sleep modes without a clock. The comparator is enabled 
continuously, and changes in the state of the comparator are detected asynchronously. When a toggle occurs, the Power 
Manager will start GCLK_AC_DIG to register the appropriate peripheral events and interrupts. The GCLK_AC_DIG clock 
is then disabled again automatically, unless configured to wake up the system from sleep.

Single-shot operation is selected by writing COMPCTRLx.SINGLE to one. During single-shot operation, the comparator 
is normally idle. The user starts a single comparison by writing a one to the respective Start Comparison bit in the write-
only Control B register (CTRLB.STARTx). The comparator is enabled, and after the start-up time has passed, a single 
comparison is done and STATUSA is updated. Appropriate peripheral events and interrupts are also generated. No new 
comparisons will be performed.

Writing a one to CTRLB.STARTx also clears the Comparator x Ready bit in the Status B register (STATUSB.READYx). 
STATUSB.READYx is set automatically by hardware when the single comparison has completed. To remove the need 
for polling, an additional means of starting the comparison is also available. A read of the Status C register (STATUSC) 
will start a comparison on all comparators currently configured for single-shot operation. The read will stall the bus until 
all enabled comparators are ready. If a comparator is already busy with a comparison, the read will stall until the current 
comparison is compete, and a new comparison will not be started.

A single-shot measurement can also be triggered by the Event System. Writing a one to the Comparator x Event Input bit 
in the Event Control Register (EVCTRL.COMPEIx) enables triggering on incoming peripheral events. Each comparator 
can be triggered independently by separate events. Event-triggered operation is similar to user-triggered operation; the 
difference is that a peripheral event from another hardware module causes the hardware to automatically start the 
comparison and clear STATUSB.READYx.

To detect an edge of the comparator output in single-shot operation for the purpose of interrupts, the result of the current 
measurement is compared with the result of the previous measurement (one sampling period earlier). An example of 
single-shot operation is shown in 

GCLK_AC

STATUSB.READYx

Sampled

Comparator Output

COMPCTRLx.ENABLE

t

STARTUP

Write ‘1’

2-3 cycles