Atmel Xplained Pro Evaluation Kit ATSAMD20-XPRO ATSAMD20-XPRO Data Sheet

575

Atmel | SMART SAM D20 [DATASHEET]

Atmel-42129K–SAM-D20_datasheet–06/2014

Notes:

1.

These values are based on characterization. These values are not covered by test limits in production.

2.

These values are based on simulation. These values are not covered by test limits in production or characterization.

3.

In this condition and for a sample rate of 350ksps, 1 Conversion at gain 1x takes 6 clock cycles of the ADC clock.

0.5

-

-

cycles

Conversion time

1x Gain

-

6

-

cycles

V

REF

Voltage reference range

1.0

-

V

DDANA

-0.6

V

V

REFINT1V

Internal 1V reference 

-

1.0

-

V

V

REFINTVCC0

Internal ratiometric 
reference 0

-

V

DDANA

/1.48

-

V

V

REFINTVCC1

Internal ratiometric 
reference 1

V

DDANA

>2.0V

-

V

DDANA

/2

-

V

Conversion range

Differential mode

-V

REF

/GAIN

-

+V

REF

/GAIN

V

Single-ended mode

0.0

-

+V

REF

/GAIN

V

C

SAMPLE

Sampling capacitance

-

3.5

-

pF

R

SAMPLE

Input channel source 
resistance

-

-

3.5

k

Ω

I

DD

DC supply current

f

CLK_ADC

 = 2.1MHz

I

-

1.25

1.79

mA

ENOB

Effective Number Of Bits

With gain compensation

-

10.5

11.1

bits

TUE

Total Unadjusted Error

I

1x Gain

n

1.5

4.3

15.0

LSB

INL

I

Integral Non Linearity

1x Gain

n

1.0

1.3

4.5

LSB

DNL

Differential Non Linearity

1x Gain

n

+/-0.3

+/-0.5

+/-0.95

LSB

I

Gain Error

Ext. Ref 1x

-10.0

2.5

+10.0

mV

I

V

REF

=V

DDANA

/1.48

-15.0

-1.5

+10.0

mV

I

Bandgap

-20.0

-5.0

+20.0

mV

Gain Accuracy

Ext. Ref. 0.5x

+/-0.1

+/-0.2

+/-0.45

%

Ext. Ref. 2x to 16x

+/-0.05

+/-0.1

+/-0.11

%

Offset Error

Ext. Ref. 1x

-5.0

-1.5

+5.0

mV

V

REF

=V

DDANA

/1.48

-5.0

0.5

+5.0

mV

Bandgap

-5.0

3.0

+5.0

mV