Atmel Xplained Pro Evaluation Kit ATSAMD20-XPRO ATSAMD20-XPRO Data Sheet
Product codes
ATSAMD20-XPRO
597
Atmel | SMART SAM D20 [DATASHEET]
Atmel-42129K–SAM-D20_datasheet–06/2014
Table 32-42. SPI timing characteristics and requirements
(1)
Note:
1.
These values are based on simulation. These values are not covered by test limits in production.
2.
See
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Units
t
SCK
SCK period
Master
Refer to section 25.6.2.3 Clock
Generation
ns
t
SCKW
SCK high/low width
Master
-
0.5*t
SCK
-
t
SCKR
Master
-
-
-
t
SCKF
Master
-
-
-
t
MIS
MISO setup to SCK
Master
-
29
-
t
MIH
MISO hold after SCK
Master
-
8
-
t
MOS
MOSI setup SCK
Master
-
t
SCK
/2 - 16
-
t
MOH
MOSI hold after SCK
Master
-
16
-
t
SSCK
Slave SCK Period
Slave
1*t
CLK_APB
-
-
t
SSCKW
SCK high/low width
Slave
0.5*t
SSCK
-
-
t
SSCKR
Slave
-
-
-
t
SSCKF
Slave
-
-
-
t
SIS
MOSI setup to SCK
Slave
t
SSCK
/2 - 19
-
-
t
SIH
MOSI hold after SCK
Slave
t
SSCK
/2 - 5
-
-
t
SSS
SS setup to SCK
Slave
PRELOADEN=1
2*t
CLK_APB
+ t
SOS
-
-
PRELOADEN=0
t
SOS
+7
-
-
t
SSH
SS hold after SCK
Slave
t
SIH
- 4
-
-
t
SOS
MISO setup SCK
Slave
-
t
SSCK
/2 - 20
-
t
SOH
MISO hold after SCK
Slave
-
20
-
t
SOSS
MISO setup after SS low
Slave
-
16
-
t
SOSH
MISO hold after SS high
Slave
-
11
-