Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Data Sheet
Product codes
ATSAM4S-WPIR-RD
361
SAM4S Series [DATASHEET]
Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14
When programming is completed, the FRDY bit in EEFC_FSR rises. If an interrupt has been enabled by
setting the FRDY bit in EEFC_FMR, the interrupt line of the interrupt controller is activated.
Three errors can be detected in EEFC_FSR after a programming sequence:
Command Error: a bad keyword has been written in EEFC_FCR.
Lock Error: at least one page to be erased belongs to a locked region. The erase command has been
refused, no page has been erased. A command must be run previously to unlock the corresponding region.
Flash Error: at the end of the programming, the EraseVerify test of the Flash memory has failed.
20.4.3.4 Lock Bit Protection
Lock bits are associated with several pages in the embedded Flash memory plane. This defines lock regions in the
embedded Flash memory plane. They prevent writing/erasing protected pages.
The lock sequence is:
The lock sequence is:
The Set lock bit command (SLB) and a page number to be protected are written in EEFC_FCR.
When the locking completes, the FRDY bit in EEFC_FSR rises. If an interrupt has been enabled by setting
the FRDY bit in EEFC_FMR, the interrupt line of the interrupt controller is activated.
The result of the SLB command can be checked running a Get Lock Bit (GLB) command.
Note:
The value of the FARG argument passed together with SLB command must not exceed the higher lock bit index
available in the product.
Two errors can be detected in EEFC_FSR after a programming sequence:
Command Error: a bad keyword has been written in EEFC_FCR.
Flash Error: at the end of the programming, the EraseVerify or WriteVerify test of the Flash memory has
failed.
It is possible to clear lock bits previously set. Then the locked region can be erased or programmed. The unlock
sequence is:
The Clear lock bit command (CLB) and a page number to be unprotected are written in EEFC_FCR.
When the unlock completes, the FRDY bit in EEFC_FSR rises. If an interrupt has been enabled by setting
the FRDY bit in EEFC_FMR, the interrupt line of the interrupt controller is activated.
Note:
The value of the FARG argument passed together with CLB command must not exceed the higher lock bit index
available in the product.
Two errors can be detected in EEFC_FSR after a programming sequence:
Command Error: a bad keyword has been written in EEFC_FCR.
Flash Error: at the end of the programming, the EraseVerify or WriteVerify test of the Flash memory has
failed.
The status of lock bits can be returned by the EEFC. The Get lock bit status sequence is:
The Get lock bit command (GLB) is written in EEFC_FCR, FARG field is meaningless.
Lock bits can be read by the software application in EEFC_FRR. The first word read corresponds to the 32
first lock bits, next reads providing the next 32 lock bits as long as it is meaningful. Extra reads to
EEFC_FRR return 0.
For example, if the third bit of the first word read in EEFC_FRR is set, then the third lock region is locked.
Two errors can be detected in EEFC_FSR after a programming sequence:
Two errors can be detected in EEFC_FSR after a programming sequence:
Command Error: a bad keyword has been written in EEFC_FCR
Flash Error: at the end of the programming, the EraseVerify or WriteVerify test of the Flash memory has
failed.
Note:
Access to the Flash in read is permitted when a set, clear or get lock bit command is performed.