Atmel Xplained Evaluation Board AT32UC3A3-XPLD AT32UC3A3-XPLD Data Sheet

Product codes
AT32UC3A3-XPLD
Page of 1021
232
32072H–AVR32–10/2012
AT32UC3A3
16.8
User Interface
Table 16-5.
SDRAMC Register Memory Map
Offset
Register
Register Name
Access
Reset
0x00
Mode Register
MR
Read/Write
0x00000000
0x04
Refresh Timer Register
TR
Read/Write
0x00000000
0x08
Configuration Register
CR
Read/Write
0x852372C0
0x0C
High Speed Register
HSR
Read/Write
0x00000000
0x10
Low Power Register
LPR
Read/Write
0x00000000
0x14
Interrupt Enable Register
IER
Write-only
0x00000000
0x18
Interrupt Disable Register
IDR
Write-only
0x00000000
0x1C
Interrupt Mask Register
IMR
Read-only
0x00000000
0x20
Interrupt Status Register
ISR
Read-only
0x00000000
0x24
Memory Device Register
MDR
Read/Write
0x00000000
0xFC
Version Register
VERSION
Read-only
-
 (1)
1. The reset values for these fields are device specific. Please refer to the Module Configuration section at the end of this chap-
ter.