Atmel Xplained Evaluation Board AT32UC3A3-XPLD AT32UC3A3-XPLD Data Sheet
Product codes
AT32UC3A3-XPLD
239
32072H–AVR32–10/2012
AT32UC3A3
• LPCB: Low Power Configuration Bits
LPCB
Low Power Configuration
0
Low power feature is inhibited: no power-down, self refresh or deep power-down command is issued to
the SDRAM device.
the SDRAM device.
1
The SDRAMC issues a self refresh command to the SDRAM device, the SDCLK clock is deactivated and
the SDCKE signal is set low. The SDRAM device leaves the self refresh mode when accessed and
enters it after the access.
the SDCKE signal is set low. The SDRAM device leaves the self refresh mode when accessed and
enters it after the access.
2
The SDRAMC issues a power-down command to the SDRAM device after each access, the SDCKE
signal is set to low. The SDRAM device leaves the power-down mode when accessed and enters it after
the access.
signal is set to low. The SDRAM device leaves the power-down mode when accessed and enters it after
the access.
3
The SDRAMC issues a deep power-down command to the SDRAM device. This mode is unique to low-
power SDRAM.
power SDRAM.