Atmel Xplained Evaluation Board AT32UC3A3-XPLD AT32UC3A3-XPLD Data Sheet
Product codes
AT32UC3A3-XPLD
370
32072H–AVR32–10/2012
AT32UC3A3
19.12.16 Source Software Transaction Request Register
Name: ReqSrcReg
Access Type: Read/write
Offset:
0x368
Reset Value:
0x00000000
A bit is assigned for each channel in this register. ReqSrcReg[n] is ignored when software handshaking is not enabled for
the source of channel n.
the source of channel n.
A channel SRC_REQ bit is written only if the corresponding channel write enable bit in the REQ_WE field is asserted on
the same System Bus write transfer.
the same System Bus write transfer.
For example, writing 0x101 writes a 1 into ReqSrcReg[0], while ReqSrcReg[4:1] remains unchanged. Writing hex 0x0yy
leaves ReqSrcReg[4:0] unchanged. This allows software to set a bit in the ReqSrcReg register without performing a read-
modified write
leaves ReqSrcReg[4:0] unchanged. This allows software to set a bit in the ReqSrcReg register without performing a read-
modified write
• REQ_WE[11:8]: Request write enable
0 = Write disabled
1 = Write enabled
• SRC_REQ[3:0]: Source request
31
30
29
28
27
26
25
24
-
-
-
-
-
-
-
-
23
22
21
20
19
18
17
16
-
-
-
-
-
-
-
-
15
14
13
12
11
10
9
8
-
-
-
-
REQ_WE3
REQ_WE2
REQ_WE1
REQ_WE0
7
6
5
4
3
2
1
0
-
-
-
-
SRC_REQ3
SRC_REQ2
SRC_REQ1
SRC_REQ0