Atmel Xplained Evaluation Board AT32UC3A3-XPLD AT32UC3A3-XPLD Data Sheet
Product codes
AT32UC3A3-XPLD
403
32072H–AVR32–10/2012
AT32UC3A3
20.8
Module configuration
The specific configuration for each GPIO instance is listed in the following tables.The module
bus clocks listed here are connected to the system bus clocks according to the table in the Sys-
tem Bus Clock Connections section.
bus clocks listed here are connected to the system bus clocks according to the table in the Sys-
tem Bus Clock Connections section.
The reset values for all GPIO registers are zero with the following exceptions:
Table 20-2.
Module configuration
Feature
GPIO
Number of GPIO ports
4
Number of peripheral functions
4
Table 20-3.
Module clock name
Module name
Clock name
GPIO
CLK_GPIO
Table 20-4.
Register Reset Values
Port
Register
Reset Value
0
GPER
0xFFFFFFFF
0
GFER
0xFFFFFFFF
1
GPER
0xFFFFFFFF
1
GFER
0xFFFFFFFF
2
GPER
0xFFFFFFFF
2
GFER
0xFFFFFFFF
3
GPER
0x00007FFF
3
GFER
0x00007FFF