Atmel Xplained Evaluation Board AT32UC3A3-XPLD AT32UC3A3-XPLD Data Sheet

32072H–AVR32–10/2012

This bit is one when no command is in progress, and no command waiting to be issued. 

Otherwise, this bit is cleared.

This bit is one when the current command has completed successfully.

This bit is zero if the command failed due to conditions such as a NAK receved from slave.

This bit is cleared by writing 1 to the corresponding bit in the Status Clear Register (SCR).

This bit is one when CMDR and/or NCMDR is ready to receive one or more commands.

This bit is cleared when this is no longer true.

This bit is one when THR is ready for one or more data bytes.

This bit is cleared when this is no longer true (i.e. THR is full or transmission has stopped).

This bit is one when RX data are ready to be read from RHR.

This bit is cleared when this is no longer true.