Atmel Xplained Evaluation Board AT32UC3A3-XPLD AT32UC3A3-XPLD Data Sheet
Product codes
AT32UC3A3-XPLD
52
32072H–AVR32–10/2012
AT32UC3A3
Figure 7-6.
Reset Controller Block Diagram
In addition to the listed reset types, the JTAG can keep parts of the device statically reset
through the JTAG Reset Register. See JTAG documentation for details.
through the JTAG Reset Register. See JTAG documentation for details.
Table 7-3.
Reset Description
When a reset occurs, some parts of the chip are not necessarily reset, depending on the reset
source. Only the Power On Reset (POR) will force a reset of the whole chip.
source. Only the Power On Reset (POR) will force a reset of the whole chip.
Reset source
Description
Power-on Reset
Supply voltage below the power-on reset detector
threshold voltage
threshold voltage
External Reset
RESET_N pin asserted
Brownout Reset
Supply voltage below the brownout reset detector
threshold voltage
threshold voltage
CPU Error
Caused by an illegal CPU access to external memory
while in Supervisor mode
while in Supervisor mode
Watchdog Timer
See watchdog timer documentation.
OCD
See On-Chip Debug documentation
J T A G
R e se t
C o n tro lle r
R E S E T _ N
P o w e r-O n
D e te cto r
O C D
W D T
R C _ R C A U S E
C P U , H S B ,
P B A , P B B
O C D , R T C /W D T ,
C lo ck G e n e ra to r
B ro w n o u t
D e te cto r