Atmel Xplained Evaluation Board AT32UC3A3-XPLD AT32UC3A3-XPLD Data Sheet

32072H–AVR32–10/2012

• Write a one to CR.TXEN and CR.RXEN to enable both transmitter and receiver

• Wait until CSR.TXRDY is one

• Send the header by writing to LINIR.IDCHR

The following procedure depends on the LINMR.NACT setting:

• Case 1: LINMR.NACT is 0x0 (PUBLISH, the USART transmits the response)

– Wait until CSR.TXRDY is one

– Send a byte by writing to THR.TXCHR

– Repeat the two previous steps until there is no more data to send

– Wait until CSR.LINTC is one

– Check for LIN errors

• Case 2: LINMR.NACT is 0x1 (SUBSCRIBE, the USART receives the response)

– Wait until CSR.RXRDY is one

– Read RHR.RXCHR

– Repeat the two previous steps until there is no more data to read

– Wait until CSR.LINTC is one

– Check for LIN errors

• Case 3: LINMR.NACT is 0x2 (IGNORE, the USART is not concerned by a response)

– Wait until CSR.LINTC is one

– Check for LIN errors

Figure 25-33. Master Node Configuration, LINMR.NACT is 0x0 (PUBLISH)

Frame

Break

Synch

Protected

Identifier

Data 1

Data N

Checksum

TXRDY

Write

THR

Write

LINIR

Data 1

Data 2

Data 3

Data N-1

Data N

RXRDY

Header

Inter-

frame

space

Response

space

Frame slot = TFrame_Maximum

Response

Data3

LINTC

FSDIS=1

FSDIS=0