Atmel Xplained Evaluation Board AT32UC3A3-XPLD AT32UC3A3-XPLD Data Sheet

32072H–AVR32–10/2012

This bit is set when a 0 to 1 transition on the POSCSR.LOCK1 bit is detected: 

PLL 1 is locked and ready to be selected as 

clock source.

This bit is cleared when the corresponding bit in ICR is written to one.

This bit is set when a 0 to 1 transition on the POSCSR.LOCK0 bit is detected: 

PLL 0 is locked and ready to be selected as 

clock source.

This bit is cleared when the corresponding bit in ICR is written to one.