Atmel Xplained Evaluation Board AT32UC3A3-XPLD AT32UC3A3-XPLD Data Sheet
Product codes
AT32UC3A3-XPLD
925
32072H–AVR32–10/2012
AT32UC3A3
34.7.7
Interrupt Status Register
Name:
ISR
Access Type:
Read-only
Offset:
0x1C
Reset Value:
0x00000000
•
TXREADY: TX Ready Interrupt Status
This bit is set when the Audio Bitstream DAC is ready to receive a new data in SDR.
This bit is cleared when the Audio Bitstream DAC is not ready to receive a new data in SDR.
•
UNDERRUN: Underrun Interrupt Status
This bit is set when at least one Audio Bitstream DAC Underrun has occurred since the last time this bit was cleared (by reset or
by writing in ICR).
This bit is cleared when no Audio Bitstream DAC Underrun has occurred since the last time this bit was cleared (by reset or by
writing in ICR).
31
30
29
28
27
26
25
24
-
-
TXREADY
UNDERRUN
-
-
-
-
23
22
21
20
19
18
17
16
-
-
-
-
-
-
-
-
15
14
13
12
11
10
9
8
-
-
-
-
-
-
-
-
7
6
5
4
3
2
1
0
-
-
-
-
-
-
-
-