Atmel Evaluation Kit for AT32uC3A0512, 32-Bit AVR Microcontroller Atmel ATEVK1105 ATEVK1105 Data Sheet
Product codes
ATEVK1105
222
AT32UC3A
24.5
Application Block Diagram
Figure 24-2.
Application Block Diagram
24.6
I/O Lines Description
24.7
Product Dependencies
24.7.1
I/O Lines
Both TWD and TWCK are bidirectional lines, connected to a positive supply voltage via a current
source or pull-up resistor (see
). When the bus is free, both lines are
high. The output stages of devices connected to the bus must have an open-drain or open-col-
lector to perform the wired-AND function.
TWD and TWCK pins may be multiplexed with GPIO lines. To enable the TWI, the programmer
TWD and TWCK pins may be multiplexed with GPIO lines. To enable the TWI, the programmer
must perform the following steps:
• Program the GPIO controller to:
• Program the GPIO controller to:
– Dedicate TWD and TWCK as peripheral lines.
– Define TWD and TWCK as open-drain.
– Define TWD and TWCK as open-drain.
24.7.2
Power Management
The TWI clock is generated by the Power Manager (PM). Before using the TWI, the programmer
must ensure that the TWI clock is enabled in the PM.
In the TWI description, Master Clock (MCK) is the clock of the peripheral bus to which the TWI is
In the TWI description, Master Clock (MCK) is the clock of the peripheral bus to which the TWI is
connected.
Table 24-3.
I/O Lines Description
Pin Name
Pin Description
Type
TWD
Two-wire Serial Data
Input/Output
TWCK
Two-wire Serial Clock
Input/Output
Host with
TWI
Interface
TWD
TWCK
Atmel TWI
Serial EEPROM
I²C RTC
I²C LCD
Controller
Slave 1
Slave 2
Slave 3
VDD
I²C Temp.
Sensor
Slave 4
Rp: Pull up value as given by the I²C Standard
Rp
Rp
32058K AVR32-01/12