Atmel Evaluation Kit for AT32uC3A0512, 32-Bit AVR Microcontroller Atmel ATEVK1105 ATEVK1105 Data Sheet
Product codes
ATEVK1105
331
AT32UC3A
26.7.6.3
IrDA Demodulator
The demodulator is based on the IrDA Receive filter comprised of an 8-bit down counter which is
loaded with the value programmed in IFR. When a falling edge is detected on the RXD pin, the
Filter Counter starts counting down at the CLK_USART speed. If a rising edge is detected on the
RXD pin, the counter stops and is reloaded with IFR. If no rising edge is detected when the
counter reaches 0, the input of the receiver is driven low during one bit time.
illustrates the operations of the IrDA demodulator.
Figure 26-35.
IrDA Demodulator Operations
As the IrDA mode uses the same logic as the ISO7816, note that the FI_DI_RATIO field in FIDI
must be set to a value higher than 0 in order to assure IrDA communications operate correctly.
3 686 400
9 600
24
0.00%
19.53
20 000 000
9 600
130
0.16%
19.53
32 768 000
9 600
213
0.16%
19.53
40 000 000
9 600
260
0.16%
19.53
3 686 400
2 400
96
0.00%
78.13
20 000 000
2 400
521
0.03%
78.13
32 768 000
2 400
853
0.04%
78.13
Table 26-10.
IrDA Baud Rate Error (Continued)
Peripheral Clock
Baud Rate
CD
Baud Rate Error
Pulse Time
CLK_USART
RXD
Counter
Value
Receiver
Input
6 5 4
6
3
Pulse
Rejected
2
6
4
5
3 2 1 0
Pulse
Accepted
Driven Low During 16 Baud Rate Clock Cycles
32058K
AVR32-01/12