Atmel Evaluation Kit for AT32uC3A0512, 32-Bit AVR Microcontroller Atmel ATEVK1105 ATEVK1105 Data Sheet
Product codes
ATEVK1105
507
AT32UC3A
Disabling a pipe (PENX = 0) or an endpoint (EPENX = 0) resets neither its ALLOC bit nor its
configuration (PBK/EPBK, PSIZE/EPSIZE, PTOKEN/EPDIR, PTYPE/EPTYPE, PEPNUM, INT-
FRQ). To free its memory, the firmware should clear its ALLOC bit. The k
i+1
pipe/endpoint
memory window then slides down and its data is lost. Note that the following pipe/endpoint
memory windows (from k
i+2
) do not slide.
illustrates the allocation and reorganization of the DPRAM in a typical example.
Figure 30-8.
Allocation and Reorganization of the DPRAM
• First, the pipes/endpoints 0 to 5 are enabled, configured and allocated in ascending order.
Each pipe/endpoint then owns a memory area in the DPRAM.
• Then, the pipe/endpoint 3 is disabled, but its memory is kept allocated by the controller.
• In order to free its memory, its ALLOC bit is then cleared by the firmware. The pipe/endpoint 4
• In order to free its memory, its ALLOC bit is then cleared by the firmware. The pipe/endpoint 4
memory window slides down, but the pipe/endpoint 5 does not move.
• Finally, if the firmware chooses to reconfigure the pipe/endpoint 3 with a larger size, the
controller allocates a memory area after the pipe/endpoint 2 memory area and automatically
slides up the pipe/endpoint 4 memory window. The pipe/endpoint 5 does not move and a
memory conflict appears as the memory windows of the pipes/endpoints 4 and 5 overlap. The
data of these pipes/endpoints is potentially lost.
Note that:
•there is no way the data of the pipe/endpoint 0 can be lost (except if it is de-allocated) as
memory allocation and de-allocation may affect only higher pipes/endpoints;
•deactivating then reactivating a same pipe/endpoint with the same configuration only modifies
temporarily the controller DPRAM pointer and size for this pipe/endpoint, but nothing
changes in the DPRAM, so higher endpoints seem to not have been moved and their data is
preserved as far as nothing has been written or received into them while changing the
allocation state of the first pipe/endpoint;
•when the firmware sets the ALLOC bit, the CFGOK bit is set by hardware only if the
configured size and number of banks are correct compared to their maximal allowed values
for the endpoint and to the maximal FIFO size (i.e. the DPRAM size), so the value of CFGOK
does not consider memory allocation conflicts.
Free Memory
PEP0
PEP1
PEP2
PEP3
PEP4
PEP5
U(P/E)RST.(E)PENX = 1
U(P/E)CFGX.ALLOC = 1
Free Memory
PEP0
PEP1
PEP2
PEP4
PEP5
Free Memory
PEP0
PEP1
PEP2
PEP4
PEP5
Pipe/Endpoint 3
Disabled
Pipe/Endpoint 3
Memory Freed
Free Memory
PEP0
PEP1
PEP2
PEP3 (larger size)
PEP5
Pipe/Endpoint 3
Activated
PEP4 Lost Memory
PEP4
Conflict
U(P/E)RST.(E)PEN3 = 0
PEP3
(ALLOC stays at 1)
U(P/E)CFG3.ALLOC = 0
U(P/E)RST.(E)PEN3 = 1
U(P/E)CFG3.ALLOC = 1
Pipes/Endpoints 0..5
Activated
32058K
AVR32-01/12