Atmel Evaluation Kit for AT32uC3A0512, 32-Bit AVR Microcontroller Atmel ATEVK1105 ATEVK1105 Data Sheet
Product codes
ATEVK1105
661
AT32UC3A
0 = Counter clock is not disabled when counter reaches RC.
1 = Counter clock is disabled when counter reaches RC.
1 = Counter clock is disabled when counter reaches RC.
• EEVTEDG: External Event Edge Selection
• EEVT: External Event Selection
Note:
1.
If TIOB is chosen as the external event signal, it is configured as an input and no longer generates waveforms and subse-
quently no IRQs
quently no IRQs
.
• ENETRG: External Event Trigger Enable
0 = The external event has no effect on the counter and its clock. In this case, the selected external event only controls the
TIOA output.
1 = The external event resets the counter and starts the counter clock.
1 = The external event resets the counter and starts the counter clock.
• WAVSEL: Waveform Selection
• WAVE = 1
0 = Waveform Mode is disabled (Capture Mode is enabled).
1 = Waveform Mode is enabled.
1 = Waveform Mode is enabled.
EEVTEDG
Edge
0
0
none
0
1
rising edge
1
0
falling edge
1
1
each edge
EEVT
Signal selected as external event
TIOB Direction
0
0
TIOB
input
(1)
0
1
XC0
output
1
0
XC1
output
1
1
XC2
output
WAVSEL
Effect
0
0
UP mode without automatic trigger on RC Compare
1
0
UP mode with automatic trigger on RC Compare
0
1
UPDOWN mode without automatic trigger on RC Compare
1
1
UPDOWN mode with automatic trigger on RC Compare
32058K
AVR32-01/12