Atmel SAM4L Xplained Pro Evaluation Kit Atmel ATSAM4L-XPRO ATSAM4L-XPRO Data Sheet

42023E–SAM–07/2013

Note:

1. These values are based on simulation. These values are not covered by test limits in production or characterization.

Table 42-66. SWD Timings

(1)

Thigh

SWDCLK High period

V

VDDIO 

from 

3.0V to 3.6V, 

maximum 

external 

capacitor = 

40pF

10

500 000

ns

Tlow

SWDCLK Low period

10

500 000

Tos

SWDIO output skew to falling edge SWDCLK

-5

5

Tis

Input Setup time required between SWDIO

4

-

Tih

Input Hold time required between SWDIO and 
rising edge SWDCLK

1

-