Atmel SAM4L Xplained Pro Evaluation Kit Atmel ATSAM4L-XPRO ATSAM4L-XPRO Data Sheet
Product codes
ATSAM4L-XPRO
625
42023E–SAM–07/2013
ATSAM4L8/L4/L2
1: Oversampling at 8 times the baud rate.
• CLKO: Clock Output Select
0: The USART does not drive the CLK pin.
1: The USART drives the CLK pin unless USCLKS selects the external clock.
• MODE9: 9-bit Character Length
0: CHRL defines character length.
1: 9-bit character length.
• MSBF/CPOL: Bit Order or SPI Clock Polarity
If USART does not operate in SPI Mode:
MSBF=0: Least Significant Bit is sent/received first.
MSBF=1: Most Significant Bit is sent/received first.
If USART operates in SPI Mode, CPOL is used with CPHA to produce the required clock/data relationship between devices.
CPOL=0: The inactive state value of CLK is logic level zero.
CPOL=1: The inactive state value of CLK is logic level one.
• CHMODE: Channel Mode
• NBSTOP: Number of Stop Bits
• PAR: Parity Type
• SYNC/CPHA: Synchronous Mode Select or SPI Clock Phase
If USART does not operate in SPI Mode (MR.MODE is not equal to 0xE or 0xF):
SYNC = 0: USART operates in Asynchronous mode.
Table 24-18.
CHMODE
Mode Description
0
0
Normal Mode
0
1
Automatic Echo. Receiver input is connected to the TXD pin.
1
0
Local Loopback. Transmitter output is connected to the Receiver input.
1
1
Remote Loopback. RXD pin is internally connected to the TXD pin.
Table 24-19.
NBSTOP
Asynchronous (SYNC=0)
Synchronous (SYNC=1)
0
0
1 stop bit
1 stop bit
0
1
1.5 stop bits
Reserved
1
0
2 stop bits
2 stop bits
1
1
Reserved
Reserved
Table 24-20.
PAR
Parity Type
0
0
0
Even parity
0
0
1
Odd parity
0
1
0
Parity forced to 0 (Space)
0
1
1
Parity forced to 1 (Mark)
1
0
x
No parity
1
1
x
Multidrop mode