Atmel SAM4L Xplained Pro Starter Kit Atmel ATSAM4L-XSTK ATSAM4L-XSTK Data Sheet

42023E–SAM–07/2013

Figure 42-16.  SPI Slave Mode, NPCS Timing

Note:

1. These values are based on simulation. These values are not covered by test limits in production.

The maximum SPI slave input frequency is given by the following formula:

Where 

 is the MOSI setup and hold time, SPI7 + SPI8 or SPI10 + SPI11 depending on

CPOL and NCPHA.

 is the maximum frequency of the CLK_SPI. Refer to the SPI chap-

ter for a description of this clock.

The maximum SPI slave output frequency is given by the following formula:

SPI14

SPI12

SPI15

SPI13

NPCS

SPCK, CPOL=0

SPCK, CPOL=1

Table 42-63. SPI Timing, Slave Mode

(1)

SPI6

SPCK falling to MISO delay

V

VDDIO 

from 

3.0V to 3.6V, 

maximum 

external 

capacitor = 

40pF

79

ns

SPI7

MOSI setup time before SPCK rises

2.1

SPI8

MOSI hold time after SPCK rises

7.3

SPI9

SPCK rising to MISO delay

80

SPI10

MOSI setup time before SPCK falls

1

SPI11

MOSI hold time after SPCK falls

6

SPI12

NPCS setup time before SPCK rises

4

SPI13

NPCS hold time after SPCK falls

1

SPI14

NPCS setup time before SPCK falls

4.1

SPI15

NPCS hold time after SPCK rises

1.4

1

------------

(

,

)

=

1

+

------------------------------------

(

,

)

=