Atmel SAM4L Xplained Pro Starter Kit Atmel ATSAM4L-XSTK ATSAM4L-XSTK Data Sheet

42023E–SAM–07/2013

0: The FIFO is not used in reception (only one character can be stored in the SPI).

1: Mode fault detection is disabled. If the I/O controller does not have open-drain capability, mode fault detection must be 

disabled for proper operation of the SPI.

0: Mode fault detection is enabled. 

0: The chip selects are directly connected to a peripheral device.

1: The four chip select lines are connected to a 4- to 16-bit decoder.

When PCSDEC equals one, up to 15 Chip Select signals can be generated with the four lines using an external 4- to 16-bit 

decoder. The CSRn registers define the characteristics of the 15 chip selects according to the following rules:

CSR0 defines peripheral chip select signals 0 to 3.

CSR1 defines peripheral chip select signals 4 to 7.

CSR2 defines peripheral chip select signals 8 to 11.

CSR3 defines peripheral chip select signals 12 to 14.

1: Variable Peripheral Select.

0: Fixed Peripheral Select.

1: SPI is in master mode.

0: SPI is in slave mode.