Atmel Xplained Pro Evaluation Kit for the ATSAMD21J18A Microcontroller ATSAMD21-XPRO ATSAMD21-XPRO Data Sheet

Product codes
ATSAMD21-XPRO
Page of 1018
114
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181C–SAM-D21_Datasheet–07/2014
IDLE Mode
The IDLE modes allow power optimization with the fastest wake-up time.
The CPU is stopped. To further reduce power consumption, the user can disable the clocking of modules and clock 
sources by configuring the SLEEP.IDLE bit group. The module will be halted regardless of the bit settings of the mask 
registers in the Power Manager (PM.AHBMASK, PM.APBxMASK).
Regulator operates in normal mode.
z
Entering IDLE mode: The IDLE mode is entered by executing the WFI instruction. Additionally, if the 
SLEEPONEXIT bit in the ARM Cortex System Control register (SCR) is set, the IDLE mode will also be entered 
when the CPU exits the lowest priority ISR. This mechanism can be useful for applications that only require the 
processor to run when an interrupt occurs. Before entering the IDLE mode, the user must configure the IDLE mode 
configuration bit group and must write a zero to the SCR.SLEEPDEEP bit.
z
Exiting IDLE mode: The processor wakes the system up when it detects the occurrence of any interrupt that is not 
masked in the NVIC Controller with sufficient priority to cause exception entry. The system goes back to the 
ACTIVE mode. The CPU and affected modules are restarted.
STANDBY Mode
The STANDBY mode allows achieving very low power consumption.
In this mode, all clocks are stopped except those which are kept running if requested by a running module or have the 
ONDEMAND bit set to zero. For example, the RTC can operate in STANDBY mode. In this case, its Generic Clock clock 
source will also be enabled. 
The regulator and the RAM operate in low-power mode.
A SLEEPONEXIT feature is also available.
z
Entering STANDBY mode: This mode is entered by executing the WFI instruction with the SCR.SLEEPDEEP bit of 
the CPU is written to 1.
z
Exiting STANDBY mode: Any peripheral able to generate an asynchronous interrupt can wake up the system. For 
example, a module running on a Generic clock can trigger an interrupt. When the enabled asynchronous wake-up 
event occurs and the system is woken up, the device will either execute the interrupt service routine or continue 
the normal program execution according to the Priority Mask Register (PRIMASK) configuration of the CPU.
Table 15-4. Sleep Mode Overview
Sleep
Mode
CPU
Clock
AHB
Clock
APB
Clock
Oscillators
Main
Clock
Regulator
Mode
RAM
Mode
ONDEMAND = 0
ONDEMAND = 1
RUNSTDBY=0
RUNSTDBY=1
RUNSTDBY=0
RUNSTDBY=1
Idle 0
Stop
Run
Run
Run
Run
Run if 
requested
Run if 
requested
Run
Normal
Normal
Idle 1
Stop
Stop
Run
Run
Run
Run if 
requested
Run if 
requested
Run
Normal
Normal
Idle 2
Stop
Stop
Stop
Run
Run
Run if 
requested
Run if 
requested
Run
Normal
Normal
Standby
Stop
Stop
Stop
Stop
Run
Stop
Run if 
requested
Stop
Low 
power
Low 
power