Atmel Xplained Pro Evaluation Kit for the ATSAMD21J18A Microcontroller ATSAMD21-XPRO ATSAMD21-XPRO Data Sheet
Product codes
ATSAMD21-XPRO
192
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181C–SAM-D21_Datasheet–07/2014
16.8.15 Voltage Regulator System (VREG) Control
Name:
VREG
Offset:
0x3C
Reset:
0x0X00
Property:
Write-Protected
z
Bits 15:14 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
z
Bit 13 – FORCELDO: Force LDO Voltage Regulator
0: The voltage regulator is in low power and low drive configuration in standby sleep mode.
1: The voltage regulator is in low power and high drive configuration in standby sleep mode.
0: The voltage regulator is in low power and low drive configuration in standby sleep mode.
1: The voltage regulator is in low power and high drive configuration in standby sleep mode.
z
Bits 12:7 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
z
Bit 6 – RUNSTDBY: Run in Standby
0: The voltage regulator is in low power configuration in standby sleep mode.
1: The voltage regulator is in normal configuration in standby sleep mode.
0: The voltage regulator is in low power configuration in standby sleep mode.
1: The voltage regulator is in normal configuration in standby sleep mode.
z
Bits 5:0 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
Bit
15
14
13
12
11
10
9
8
FORCELDO
Access
R
R
R/W
R
R
R
R
R
Reset
0
0
0
0
0
0
0
0
Bit
7
6
5
4
3
2
1
0
RUNSTDBY
Access
R
R/W
R
R
R
R
R
R
Reset
0
0
0
0
0
0
0
0