Atmel Xplained Pro Evaluation Kit for the ATSAMD21J18A Microcontroller ATSAMD21-XPRO ATSAMD21-XPRO Data Sheet

272

Atmel | SMART SAM D21 [DATASHEET]

Atmel-42181C–SAM-D21_Datasheet–07/2014

register(

.STEPSEL) to one, and the Address Increment Step Size bit group in the Block Transfer Control 

.STEPSIZE), to the desired step size. If 

.STEPSEL is zero, the step size for the source 

incrementation will be the size of one beat.

 must be set to the source 

address of the last beat transfer in the block transfer. The source address should be calculated as follows:

z

SRCADDRSTART is the source address of the first beat transfer in the block transfer

z

BTCNT is the initial number of beats remaining in the block transfer

z

BEATSIZE is the configured number of bytes in a beat

z

STEPSIZE is the configured number of beats for each incrementation

 shows an example where DMA channel 0 is configured to increment the source address by one beat 

(

.SRCINC is one) after each beat transfer, and DMA channel 1 is configured to increment source address by two 

.SRCINC is one, 

.STEPSEL is one, and 

.STEPSIZE is 0x1). As the destination address 

for both channels are peripherals, destination incrementation is disabled(

.DSTINC is zero).

Incrementation for the destination address of a block transfer is enabled by writing the Destination Address 
Incrementation Enable bit in the Block Transfer Control register (

.DSTINC) to one. The step size of the 

incrementation is configurable and can be chosen by writing 

.STEPSEL to zero, and 

.STEPSIZE to the 

desired step size. If 

.STEPSEL is one, the step size for the destination incrementation will be the size of one 

beat.

destination address of the last beat transfer in the block transfer. The destination address should be calculated as 
follows:

z

DSTADDRSTART is the destination address of the first beat transfer in the block transfer

z

BTCNT is the initial number of beats remaining in the block transfer

z

BEATSIZE is the configured number of bytes in a beat

z

STEPSIZE is the configured number of beats for each incrementation

 shows an example where DMA channel 0 is configured to increment destination address by one beat 

(

.DSTINC is one) and DMA channel 1 is configured to increment destination address by two beats 

(

.STEPSEL is zero, and 

.STEPSIZE is 0x1). As the source address for both 

channels are peripherals, source incrementation is disabled(

.SRCINC is zero). 

, where 

.STEPSEL is one

, where 

 

.STEPSEL is zero

, where 

.STEPSEL is zero

, where 

 

.STEPSEL is one

BEATSIZE 1

+

(

) 2

⋅

⋅

+

=

BEATSIZE 1

+

(

)

⋅

+

=

DMA Channel 0

DMA Channel 1

PERIPHERAL 0

PERIPHERAL 1

{a,b}

{c,e}

SRC Data Buffer

a

b

c

d

e

f

BEATSIZE 1

+

(

) 2

⋅

⋅

+

=

BEATSIZE 1

+

(

)

⋅

+

=