Atmel Xplained Pro Evaluation Kit for the ATSAMD21J18A Microcontroller ATSAMD21-XPRO ATSAMD21-XPRO Data Sheet
Product codes
ATSAMD21-XPRO
300
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181C–SAM-D21_Datasheet–07/2014
z
Bits 3:0 – ID[3:0]: Channel ID
These bits store the lowest channel number with pending interrupts. The number is valid if Suspend (SUSP),
Transfer Complete (TCMPL) or Transfer Error (TERR) bits are set. The Channel ID field is refreshed when a new
channel (with channel number less than the current one) with pending interrupts is detected, or when the applica-
tion clears the corresponding channel interrupt sources. When no pending channels interrupts are available, these
bits will always return zero value when read.
When the bits are written, indirect access to the corresponding Channel Interrupt Flag register is enabled.
These bits store the lowest channel number with pending interrupts. The number is valid if Suspend (SUSP),
Transfer Complete (TCMPL) or Transfer Error (TERR) bits are set. The Channel ID field is refreshed when a new
channel (with channel number less than the current one) with pending interrupts is detected, or when the applica-
tion clears the corresponding channel interrupt sources. When no pending channels interrupts are available, these
bits will always return zero value when read.
When the bits are written, indirect access to the corresponding Channel Interrupt Flag register is enabled.