Atmel Xplained Pro Evaluation Kit for the ATSAMD21J18A Microcontroller ATSAMD21-XPRO ATSAMD21-XPRO Data Sheet

Product codes
ATSAMD21-XPRO
Page of 1018
363
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181C–SAM-D21_Datasheet–07/2014
21.8.7 Status
Name:
STATUS
Offset:
0x18
Reset:
0x0X00
Property:
-
z
Bits 15:9 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to 
zero when this register is written. These bits will always return zero when read.
z
Bit 8 – SB: Security Bit Status
0: The Security bit is inactive.
1: The Security bit is active.
z
Bits 7:5 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to 
zero when this register is written. These bits will always return zero when read.
z
Bit 4 – NVME: NVM Error
0: No programming or erase errors have been received from the NVM controller since this bit was last cleared.
1: At least one error has been registered from the NVM Controller since this bit was last cleared.
This bit can be cleared by writing a one to its bit location.
z
Bit 3 – LOCKE: Lock Error Status
0: No programming of any locked lock region has happened since this bit was last cleared.
1: Programming of at least one locked lock region has happened since this bit was last cleared.
This bit can be cleared by writing a one to its bit location.
z
Bit 2 – PROGE: Programming Error Status
0: No invalid commands or bad keywords were written in the NVM  Command register since this bit was last 
cleared.
1: An invalid command and/or a bad keyword was/were written in the NVM Command register since this bit was 
last cleared.
This bit can be cleared by writing a one to its bit location.
z
Bit 1 – LOAD: NVM Page Buffer Active Loading
This bit indicates that the NVM page buffer has been loaded with one or more words. Immediately after an NVM 
load has been performed, this flag is set, and it remains set until a page write or a page buffer clear (PBCLR) com-
mand is given.
Bit
15
14
13
12
11
10
9
8
SB
Access
R
R
R
R
R
R
R
R
Reset
0
0
0
0
0
0
0
X
Bit
7
6
5
4
3
2
1
0
NVME
LOCKE
PROGE
LOAD
PRM
Access
R
R
R
R/W
R/W
R/W
R/W
R
Reset
0
0
0
0
0
0
0
0