Atmel Xplained Pro Evaluation Kit for the ATSAMD21J18A Microcontroller ATSAMD21-XPRO ATSAMD21-XPRO Data Sheet
Product codes
ATSAMD21-XPRO
370
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181C–SAM-D21_Datasheet–07/2014
The CPU accesses the PORT module through the IOBUS when it performs read or write from address 0x60000000. The
PORT register map is equivalent to the one described in the register description section.
PORT register map is equivalent to the one described in the register description section.
This bus is generally used for low latency. The Data Direction (
) registers can be read,
written, set, cleared or toggled using this bus, and the Data Input Value (
) registers can be read.
Since the IOBUS cannot wait for IN register resynchronization, the Control register (
) must be configured to enable
continuous sampling of all pins that will need to be read via the IOBUS to prevent stale data from being read.
22.6 Functional Description
Figure 22-2. Overview of the PORT
22.6.1 Principle of Operation
The I/O pins of the device are controlled by reads and writes of the PORT peripheral registers. For each port pin, a
corresponding bit in the Data Direction (
corresponding bit in the Data Direction (
) registers are used to enable that pin as an
output and to define the output state.
The direction of each pin in a port group is configured via the DIR register. If a bit in DIR is written to one, the
corresponding pin is configured as an output pin. If a bit in DIR is written to zero, the corresponding pin is configured as
an input pin.
corresponding pin is configured as an output pin. If a bit in DIR is written to zero, the corresponding pin is configured as
an input pin.
When the direction is set as output, the corresponding bit in the OUT register is used to set the level of the pin. If bit y of
OUT is written to one, pin y is driven high. If bit y of OUT is written to zero, pin y is driven low.
OUT is written to one, pin y is driven high. If bit y of OUT is written to zero, pin y is driven low.
Additional pin configuration can be set by writing to the Pin Configuration (
) registers.
The Data Input Value bit (
) is used to read the port pin with resynchronization to the PORT clock. By default, these
input synchronizers are clocked only when an input value read is requested in order to reduce power consumption. Input
value can always be read, whether the pin is configured as input or output, except if digital input is disabled by writing a
zero to the INEN bit in the Pin Configuration registers (PINCFGy).
value can always be read, whether the pin is configured as input or output, except if digital input is disabled by writing a
zero to the INEN bit in the Pin Configuration registers (PINCFGy).
PULLENy
OUTy
DIRy
INENy
PORTx
PADy
VDD
INEN
OE
OUT
PULLEN
PADy
Pull
Resistor
PG
NG
Input to Other Modules
Analog Input/Output
IN
INy
APB Bus
Synchronizer
PORT
MULTIPLEXER
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