Atmel Xplained Pro Evaluation Kit for the ATSAMD21J18A Microcontroller ATSAMD21-XPRO ATSAMD21-XPRO Data Sheet

Product codes
ATSAMD21-XPRO
Page of 1018
438
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181C–SAM-D21_Datasheet–07/2014
After a break field is detected and the start bit of the Sync Field is detected, a counter is started. The counter is then 
incremented for the next 8 bit times of the Sync Field. At the end of these 8 bit times, the counter is stopped. At this 
moment, the 13 most significant bits of the counter (value divided by 8) gives the new clock divider (BAUD.BAUD) and 
the 3 least significant bits of this value (the remainder) gives the new Fractional Part (BAUD.FP). When the Sync Field 
has been received, the clock divider (BAUD.BAUD) and the Fractional Part (BAUD.FP) are updated in the Baud Rate 
Generator register (BAUD) after a synchronization delay.
After the Break and Sync Fields, n characters of data can be received. 
25.6.3.5  Collision Detection
When the receiver and transmitter are connected either through pin configuration or externally, transmit collision can be 
detected by setting the Collision Detection Enable bit (CTRLB.COLDEN). For collision to be detected, the receiver and 
transmitter must be enabled (CTRLB.RXEN=1 and CTRLB.TXEN=1). 
Collision detection is performed for each bit transmitted by checking the received value vs the transmit value as shown in 
. While the transmitter is idle (no transmission in progress), characters can be received on RxD without 
triggering a collision.
Figure 25-11.Collision Checking
 shows the conditions for a collision detection. In this case, the start bit and the first data bit are received 
with the same value as transmitted.  The second received data bit is found to be different than the transmitted bit at the 
detection point which indicates a collision.
Figure 25-12.Collision Detected
When a collision is detected, the USART automatically follows this sequence:
z
The current transfer is aborted.
z
The transmit buffer is flushed.
z
The transmitter is disabled (CTRLB.TXEN=0).
z
This commences immediately and is complete after synchronization time. The CTRLB Synchronization 
Busy bit (SYNCBUSY.CTRLB) will be set until this is complete.
z
This results in the TxD pin being tri-stated.
z
The Collision Detected bit (STATUS.COLL) is set along with the Error interrupt flag (INTFLAG.ERROR).
8-bit character, single stop bit
Collision checked
TXD
RXD
Collision checked and ok
TXD
RXD
Collision detected
Tri-state
TXEN