Atmel Xplained Pro Evaluation Kit for the ATSAMD21J18A Microcontroller ATSAMD21-XPRO ATSAMD21-XPRO Data Sheet

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Atmel | SMART SAM D21 [DATASHEET]

Atmel-42181C–SAM-D21_Datasheet–07/2014

z

Synchronization when written and read

z

No synchronization

When executing an operation that requires synchronization, the corresponding Synchronization Busy bit in the 
Synchronization Busy register (SYNCBUSY) will be set immediately, and cleared when synchronization is complete.

If an operation that requires synchronization is executed while the corresponding SYNCBUSY bit is one, a peripheral bus 
error is generated.

The following bits need synchronization when written:

z

Software Reset bit in the Control A register (CTRLA.SWRST). SYNCBUSY.SWRST is set to one while 
synchronization is in progress.

z

Enable bit in the Control A register (CTRLA.ENABLE). SYNCBUSY.ENABLE is set to one while synchronization is 
in progress.

z

Receiver Enable bit in the Control B register (CTRLB.RXEN). SYNCBUSY.CTRLB is set to one while 
synchronization is in progress.

z

Transmitter Enable bit in the Control B register (CTRLB.TXEN). SYNCBUSY.CTRLB is set to one while 
synchronization is in progress.

Synchronization is denoted by the Write-Synchronized property in the register description.