Atmel Xplained Pro Evaluation Kit for the ATSAMD21J18A Microcontroller ATSAMD21-XPRO ATSAMD21-XPRO Data Sheet
Product codes
ATSAMD21-XPRO
719
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181C–SAM-D21_Datasheet–07/2014
Mode:
DITH6
Name:
PER
Offset:
0x40
Reset:
0x00FFFFFF
Property:
Write-Synchronized
z
Bits 31:24 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
z
Bits 23:6 – PER[17:0]: Period Value
These bits hold the value of the period buffer register. The value is copied to PER register on UPDATE condition.
The number of bits in this field corresponds to the size of the counter.
These bits hold the value of the period buffer register. The value is copied to PER register on UPDATE condition.
The number of bits in this field corresponds to the size of the counter.
z
Bits 5:0 – DITHERCY[5:0]: Dithering Cycle Number
These bits hold the number of extra cycles that are added on the PWM period each number of frames as specified
in
These bits hold the number of extra cycles that are added on the PWM period each number of frames as specified
in
Bit
31
30
29
28
27
26
25
24
Access
R
R
R
R
R
R
R
R
Reset
0
0
0
0
0
0
0
0
Bit
23
22
21
20
19
18
17
16
PER[17:10]
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
1
1
1
1
1
1
1
1
Bit
15
14
13
12
11
10
9
8
PER[9:2]
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
1
1
1
1
1
1
1
1
Bit
7
6
5
4
3
2
1
0
PER[1:0]
DITHERCY[5:0]
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
1
1
1
1
1
1
1
1