Atmel Xplained Pro Evaluation Kit for the ATSAMD21J18A Microcontroller ATSAMD21-XPRO ATSAMD21-XPRO Data Sheet

Product codes
ATSAMD21-XPRO
Page of 1018
992
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181C–SAM-D21_Datasheet–07/2014
- FLENC 9h to Fh are equal to -1 to -7 decimal instead of -7 to -1.
39.1.8 TCC
1 - The TCC interrupts FAULT1, FAULT0, FAULTB, FAULTA, DFS, ERR,and 
CNT cannot wake up the chip from standby mode. Errata reference: 11951
Fix/Workaround:
Do not use the TCC interrupts FAULT1, FAULT0, FAULTB, FAULTA, DFS, ERR, 
or CNT to wake up the chip from standby mode.
2 - If the OVF flag in the INTFLAG register is already set when enabling the 
DMA, this will trigger an immediate DMA transfer and overwrite the current 
buffered value in the TCC register. Errata reference: 12127
Fix/Workaround:
None
3 - With blanking enabled, a recoverable fault that occurs during the first 
increment of a rising TCC is not blanked. Errata reference: 12519
Fix/Workaround:
None
4 - In Dual slope mode a Retrigger Event does not clear the TCC counter. 
Errata reference: 12354
Fix/Workaround:
None
5 - In two ramp mode, two events will be generated per cycle, one on each 
ramp’s end. EVCTRL.CNTSEL.END cannot be used to identify the end of a 
double ramp cycle. Errata reference: 12224
Fix/Workaround:
None
6 - If an input event triggered STOP action is performed at the same time as 
the counter overflows, the first pulse width of the subsequent counter start 
can be altered with one prescaled clock cycle. Errata reference: 12107
Fix/Workaround:
None
7 - When the RUNSTDBY bit is written after the TCC is enabled, the 
respective TCC APB bus is stalled and the RUNDSTBY bit in the TCC CTRLA 
register is not enabled-protected. Errata reference: 12477
Fix/Workaround:
None.