Linear Technology LT4363-2 Demo Board: High Voltage Surge Stopper with Current Limit, Auto-Retry Version DC1935A-B DC1935A-B Data Sheet

Product codes
DC1935A-B
Page of 24
LT4363
11
4363fb
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The LT4363 limits the voltage and current delivered to the 
load during supply transient or output overload events. The 
total fault timer period is set to ride through short-duration 
faults, while longer events cause the output to shut off 
and protect the MOSFET pass device from damage. The 
MOSFET provides a low resistance path from the input to 
the load during normal operation, while in fault conditions 
it operates as a series regulator.
Overvoltage Fault
The LT4363 limits the voltage at the output during an 
overvoltage at the input. An internal amplifier regulates 
the GATE pin to maintain 1.275V at the FB pin. During 
this interval the MOSFET is on and supplies current to 
the load. This allows uninterrupted operation during short 
overvoltage events. If the overvoltage condition persists, 
the timer causes the MOSFET to turn off.
Overcurrent Fault
The LT4363 features and adjustable current limit that pro-
tects against output short circuits or excessive load current. 
During an overcurrent event, the GATE pin is regulated to 
limit the current sense voltage across the SNS and OUT 
pins to 50mV. In the case of a severe short at the output, 
where OUT is less than 2V, the current sense voltage is 
reduced to 25mV to further reduce power dissipation in 
the MOSFET. If the overcurrent condition persists, the 
timer causes the MOSFET to turn off.
Fault Timer Overview
Overvoltage and overcurrent conditions are limited in 
duration by an adjustable timer. A capacitor at the TMR pin 
sets the delay time before a fault condition is reported at 
the FLT pin as well as the overall delay before the MOSFET 
is turned off. The same capacitor also sets the cool down 
time before the MOSFET is allowed to turn back on.
When either an overvoltage or overcurrent fault condition 
occurs, a current source charges the TMR pin capacitor. 
The exact current level varies as a function of the type of 
fault and the V
DS
 voltage drop across the MOSFET. This 
scheme takes better advantage of the MOSFET’s available 
Safe Operating Area (SOA) than would a fixed timer current.
The TMR pin is biased to 0.5V under normal operating 
conditions. In the presence of a fault the timer first charges 
to 1.275V, and then enters the early warning phase of 
operation. At this point the FLT pin pulls low and after 
charging to 1.375V, the timer shuts off the MOSFET. The 
warning phase is indicated by FLT low and gives time for 
the load to perform house-keeping chores such as data 
storage in anticipation of impending power loss. After 
faulting off, the timer enters the cool down phase. At the 
end of the cool down period the LT4363-1 remains off until 
reset, while the LT4363-2 automatically restarts. For the 
LT4363-2 retry is inhibited if the OV pin is greater than 
1.275V. This prevents motorboating in the event there is 
a sustained input overvoltage condition.
Fault Timer Operation in Overvoltage
In the presence of an overvoltage condition when the 
LT4363 regulates the output voltage, the timer charges 
from 0.5V to 1.275V with a current that varies as a func-
tion of V
DS
 (see Figure 1). V
DS
 is inferred from the drop 
across V
CC
 and OUT. The timer current increases linearly 
from around 4µA with V
DS
 ≤ 0.5V, to 50µA with V
DS
 = 75V. 
Because V
DS
 is measured indirectly, clamping or filtering 
at the V
CC
 pin affects the timer current response. A graph 
of Overvoltage TMR Current vs (V
CC
 – V
OUT
) is shown in 
the Typical Performance Characteristics.
When TMR reaches 1.275V, the FLT pin is latched low as 
an early warning of impending shutdown. The timer cur-
rent is cut to a fixed value of 6µA and continues to run 
until TMR reaches 1.375V, producing a fixed early warning 
period given by:
   
C
TMR
= t
WARNING
6µA
100mV
When TMR reaches 1.375V, the MOSFET is turned off and 
allowed to cool for an extended period. The total elapsed 
time between the onset of output regulation and turn-off 
is given by:
 
t
REG
=C
TMR
• 0.775V
I
TMR
+ 100mV
6µA
Because I
TMR
 is a function of V
CC
 – V
OUT
, the exact time in 
regulation depends upon the input waveform and the time 
required for the output voltage to come into regulation.