Linear Technology DC1369A-I - LTC2259-12: 12-bit 80Msps ADC, LVDS Outputs, 5-170MHz, req DC890, LVDS_XFMR and DC1075 DC1 DC1369A-I Data Sheet

Product codes

DC1369A-I

dc1369af

DEMO MANUAL DC1369A

Demonstration circuit 1369A is easy to set up to evaluate

the performance of the LTC2262 family of A/D converters.

Refer to Figure 1 for proper measurement equipment setup

and follow the procedure below:

Setup
If a DC890 QuikEval™ II Data Acquisition and Collection

System was supplied with the DC1369A demonstration

circuit, follow the DC890 Quick Start Guide to install the

required software and for connecting the DC890 to the

DC1369A and to a PC.

DC1369A Demonstration Circuit Board Jumpers
The DC1369A demonstration circuit board should have

the following jumper settings as default positions (as per

Figure 1):
JP2: PAR/SER: Selects Parallel or Serial programming

mode. (Default – Serial)
JP3: Duty Cycle Stabilizer: Enables/Disable Duty Cycle

Stabilizer. (Default – Enable)
JP4: SHDN: Enables and disables the LTC2262

(Default – Enable)

Applying Power and Signals to the DC1369A

Demonstration Circuit
If a DC890 is used to acquire data from the DC1369A,

the DC890 must first be connected to a powered USB

port or provided an external 6V to 9V before applying

3.6V to 6.0V across the pins marked V

and GND on the

DC1369A. DC1369A requires 3.6V for proper operation.

Regulators on the board produce the voltages required for

the ADC. The DC1369A demonstration circuit requires up

to 250mA depending on the sampling rate and the A/D

converter supplied.
The DC890 data collection board is powered by the USB

cable and does not require an external power supply unless

it must be connected to the PC through an unpowered hub,

in which case it must be supplied an external 6V to 9V on

turrets G7(+) and G1(–) or the adjacent 2.1mm power jack.

Analog Input Network
For optimal distortion and noise performance the RC

network on the analog inputs may need to be optimized

for different analog input frequencies. For input frequen-

cies above 170MHz, refer to the LTC2262 data sheet for a

proper input network. Other input networks may be more

appropriate for input frequencies less that 5MHz.

Quick start proceDure

Table 2. DC1369A Variants

DC1369A VARIANTS

ADC PART NUMBER

RESOLUTION

MAXIMUM SAMPLE RATE

INPUT FREQUENCY

1369A-A

LTC2261-14

14-Bit

125Msps

5MHz to 170MHz

1369A-B

LTC2260-14

14-Bit

105Msps

5MHz to 170MHz

1369A-C

LTC2259-14

14-Bit

80Msps

5MHz to 170MHz

1369A-D

LTC2258-14

14-Bit

65Msps

5MHz to 170MHz

1369A-E

LTC2257-14

14-Bit

40Msps

5MHz to 170MHz

1369A-F

LTC2256-14

14-Bit

25Msps

5MHz to 170MHz

1369A-G

LTC2261-12

12-Bit

125Msps

5MHz to 170MHz

1369A-H

LTC2260-12

12-Bit

105Msps

5MHz to 170MHz

1369A-I

LTC2259-12

12-Bit

80Msps

5MHz to 170MHz

1369A-J

LTC2258-12

12-Bit

65Msps

5MHz to 170MHz

1369A-K

LTC2257-12

12-Bit

40Msps

5MHz to 170MHz

1369A-L

LTC2256-12

12-Bit

25Msps

5MHz to 170MHz

1369A-M

LTC2262-14

14-Bit

150Msps

5MHz to 170MHz

1369A-N

LTC2262-12

12-Bit

150Msps

5MHz to 170MHz