Linear Technology LTC2654-L12 Quad SPI 12-bit Voltage Output DAC with 1.25V Reference, req DC590 DC1678A-C DC1678A-C Data Sheet
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Product codes
DC1678A-C
LTC2654
16
2654f
OPERATION
The LTC2654 is a family of quad voltage output DACs in
20-lead 4mm × 4mm QFN and in 16-lead narrow SSOP
packages. Each DAC can operate rail-to-rail in external
reference mode, or with its full-scale voltage set by an
integrated reference. Four combinations of accuracy (16-
bit and 12-bit), and full-scale voltage (2.5V or 4.096V)
are available. The LTC2654 is controlled using a 4-wire
SPI/MICROWIRE compatible interface.
20-lead 4mm × 4mm QFN and in 16-lead narrow SSOP
packages. Each DAC can operate rail-to-rail in external
reference mode, or with its full-scale voltage set by an
integrated reference. Four combinations of accuracy (16-
bit and 12-bit), and full-scale voltage (2.5V or 4.096V)
are available. The LTC2654 is controlled using a 4-wire
SPI/MICROWIRE compatible interface.
Power-On Reset
The LTC2654-L/LTC2654-H clear the output to zero-scale
if PORSEL pin is tied to GND, when power is fi rst applied,
making system initialization consistent and repeatable.
For some applications, downstream circuits are active
during DAC power-up, and may be sensitive to nonzero
outputs from the DAC during this time. The LTC2654 con-
tains circuitry to reduce the power-on glitch. The analog
outputs typically rise less than 10mV above zero-scale
during power-on if the power supply is ramped to 5V in
1ms or more. In general, the glitch amplitude decreases
as the power supply ramp time is increased. See Power-
On-Reset Glitch in the Typical Performance Characteristics
section.
if PORSEL pin is tied to GND, when power is fi rst applied,
making system initialization consistent and repeatable.
For some applications, downstream circuits are active
during DAC power-up, and may be sensitive to nonzero
outputs from the DAC during this time. The LTC2654 con-
tains circuitry to reduce the power-on glitch. The analog
outputs typically rise less than 10mV above zero-scale
during power-on if the power supply is ramped to 5V in
1ms or more. In general, the glitch amplitude decreases
as the power supply ramp time is increased. See Power-
On-Reset Glitch in the Typical Performance Characteristics
section.
Alternatively, if PORSEL pin is tied to V
CC
(Pin 18/Pin 15),
The LTC2654-L/LTC2654-H set the output to mid-scale
when power is fi rst applied.
when power is fi rst applied.
Power Supply Sequencing and Start-Up
For LTC2654 family of parts, the internal reference is
powered-up at start-up by default. If an external reference
is to be used, the REFCOMP pin (Pin 2/Pin 3) must be
hardwired to GND. Having REFCOMP hardwired to GND
at power up, will cause the REFIN/OUT pin to become
high-impedance and will allow for the use of an external
reference at start-up. However in this confi guration, internal
reference will still be ON, even though it is disconnected
from the REFIN/OUT pin and it will draw supply current. In
order to use external reference after power-up, the com-
mand Select External Reference (0111b) should be used
to turn the internal reference off (See Table 1).
powered-up at start-up by default. If an external reference
is to be used, the REFCOMP pin (Pin 2/Pin 3) must be
hardwired to GND. Having REFCOMP hardwired to GND
at power up, will cause the REFIN/OUT pin to become
high-impedance and will allow for the use of an external
reference at start-up. However in this confi guration, internal
reference will still be ON, even though it is disconnected
from the REFIN/OUT pin and it will draw supply current. In
order to use external reference after power-up, the com-
mand Select External Reference (0111b) should be used
to turn the internal reference off (See Table 1).
The voltage at REFIN/OUT (Pin 4/Pin 5) should be kept
within the range –0.3V ≤ REFIN/OUT ≤ V
within the range –0.3V ≤ REFIN/OUT ≤ V
CC
+ 0.3V (see
Absolute Maximum Ratings). Particular care should be
taken to observe these limits during power supply turn-on
and turn-off sequences, when the voltage at V
taken to observe these limits during power supply turn-on
and turn-off sequences, when the voltage at V
CC
(Pin 18/
Pin 15) is in transition.
Transfer Function
The digital-to-analog transfer function is
V
OUT(IDEAL)
=
k
2
N
⎛
⎝⎜
⎝⎜
⎞
⎠⎟
⎠⎟
• 2 • V
REF
− V
REFLO
⎡⎣
⎤⎦ + V
REFLO
where k is the decimal equivalent of the binary DAC input
code, N is the resolution of the DAC, and V
code, N is the resolution of the DAC, and V
REF
is the volt-
age at the REFIN/OUT Pin. The resulting DAC output span
is 0V to 2•V
is 0V to 2•V
REF
, as it is necessary to tie REFLO to GND.
V
REF
is nominally 1.25V for LTC2654-L and 2.048V for
LTC2654-H, in Internal Reference Mode.
Table 1. Command and Address Codes
COMMAND*
C3
C2
C1
C0
0
0
0
0
Write to Input Register
n
0
0
0
1
Update (Power-Up) DAC Register
n
0
0
1
0
Write to Input Register
n, Update (Power-Up) All
0
0
1
1
Write to and Update (Power-Up)
n
0
1
0
0
Power-Down
n
0
1
0
1
Power-Down Chip (All DAC’s and Reference)
0
1
1
0
Select Internal Reference (Power-Up Reference)
0
1
1
1
Select External Reference (Power-Down Reference)
1
1
1
1
No Operation
ADDRESS (
n)*
A3
A2
A1
A0
0
0
0
0
DAC A
0
0
0
1
DAC B
0
0
1
0
DAC C
0
0
1
1
DAC D
1
1
1
1
All DACs
*Command and address codes not shown are reserved and should not
be used.
be used.