Atmel ATmega328P Xplained Mini MEGA328P-XMINI MEGA328P-XMINI Data Sheet

Product codes
MEGA328P-XMINI
Page of 657
122
ATmega48A/PA/88A/PA/168A/PA/328/P [DATASHEET]
Atmel-8271H-AVR- ATmega-Datasheet_08/2014
16.7.3 Using the Output Compare Unit
Since writing TCNT1 in any mode of operation will block all compare matches for one timer clock cycle, there 
are risks involved when changing TCNT1 when using any of the Output Compare channels, independent of 
whether the Timer/Counter is running or not. If the value written to TCNT1 equals the OCR1x value, the 
compare match will be missed, resulting in incorrect waveform generation. Do not write the TCNT1 equal to 
TOP in PWM modes with variable TOP values. The compare match for the TOP will be ignored and the counter 
will continue to 0xFFFF. Similarly, do not write the TCNT1 value equal to BOTTOM when the counter is 
downcounting.
The setup of the OC1x should be performed before setting the Data Direction Register for the port pin to output. 
The easiest way of setting the OC1x value is to use the Force Output Compare (FOC1x) strobe bits in Normal 
mode. The OC1x Register keeps its value even when changing between Waveform Generation modes.
Be aware that the COM1x1:0 bits are not double buffered together with the compare value. Changing the 
COM1x1:0 bits will take effect immediately.
16.8
Compare Match Output Unit
The Compare Output mode (COM1x1:0) bits have two functions. The Waveform Generator uses the COM1x1:0 
bits for defining the Output Compare (OC1x) state at the next compare match. Secondly the COM1x1:0 bits 
control the OC1x pin output source. 
 shows a simplified schematic of the logic affected by the 
COM1x1:0 bit setting. The I/O Registers, I/O bits, and I/O pins in the figure are shown in bold. Only the parts of 
the general I/O Port Control Registers (DDR and PORT) that are affected by the COM1x1:0 bits are shown. 
When referring to the OC1x state, the reference is for the internal OC1x Register, not the OC1x pin. If a system 
reset occur, the OC1x Register is reset to “0”.
Figure 16-5.
Compare Match Output Unit, Schematic
The general I/O port function is overridden by the Output Compare (OC1x) from the Waveform Generator if 
either of the COM1x1:0 bits are set. However, the OC1x pin direction (input or output) is still controlled by the 
Data Direction Register
 (DDR) for the port pin. The Data Direction Register bit for the OC1x pin (DDR_OC1x) 
PORT
DDR
D
Q
D
Q
OCnx
Pin
OCnx
D
Q
Waveform
Generator
COMnx1
COMnx0
0
1
D
ATA
 B
U
S
FOCnx
clk
I/O