Atmel ATmega328P Xplained Mini MEGA328P-XMINI MEGA328P-XMINI Data Sheet

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ATmega48A/PA/88A/PA/168A/PA/328/P [DATASHEET]

Atmel-8271H-AVR- ATmega-Datasheet_08/2014

 shows the COM2A1:0 bit functionality when the WGM22:0 bits are set to phase correct PWM mode.

Note:

1.

A special case occurs when OCR2A equals TOP and COM2A1 is set. In this case, the Compare Match is 
ignored, but the set or clear is done at TOP. See 

 for more details.

These bits control the Output Compare pin (OC2B) behavior. If one or both of the COM2B1:0 bits are set, the 
OC2B output overrides the normal port functionality of the I/O pin it is connected to. However, note that the Data 
Direction Register (DDR) bit corresponding to the OC2B pin must be set in order to enable the output driver.

When OC2B is connected to the pin, the function of the COM2B1:0 bits depends on the WGM22:0 bit setting. 

 shows the COM2B1:0 bit functionality when the WGM22:0 bits are set to a normal or CTC mode 

(non-PWM).

 shows the COM2B1:0 bit functionality when the WGM22:0 bits are set to fast PWM mode.

Note:

1.

A special case occurs when OCR2B equals TOP and COM2B1 is set. In this case, the Compare Match is 
ignored, but the set or clear is done at BOTTOM. See 

 for more 

details.

0

0

Normal port operation, OC2A disconnected.

0

1

WGM22 = 0: Normal Port Operation, OC2A Disconnected.
WGM22 = 1: Toggle OC2A on Compare Match.

1

0

Clear OC2A on Compare Match when up-counting. Set OC2A on 
Compare Match when down-counting.

1

1

Set OC2A on Compare Match when up-counting. Clear OC2A on 
Compare Match when down-counting.

0

0

Normal port operation, OC2B disconnected.

0

1

Toggle OC2B on Compare Match

1

0

Clear OC2B on Compare Match

1

1

Set OC2B on Compare Match

0

0

Normal port operation, OC2B disconnected.

0

1

Reserved

1

0

Clear OC2B on Compare Match, set OC2B at BOTTOM,
(non-inverting mode).

1

1

Set OC2B on Compare Match, clear OC2B at BOTTOM,
(inverting mode).