Linear Technology LTC2461: 16-bit I²C Single-Ended Delta Sigma ADC with 10ppm max Internal Reference, req DC590 DC1491A DC1491A Data Sheet
Product codes
DC1491A
LTC2461/LTC2463
4
24613fa
The
l
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. (Notes 2, 7)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
IH
High Level Input Voltage
l
0.7V
CC
V
V
IL
Low Level Input Voltage
l
0.3V
CC
V
I
I
Digital Input Current
l
–10
10
µA
V
HYS
Hysteresis of Schmidt Trigger Inputs
(Note 3)
l
0.05V
CC
V
V
OL
Low Level Output Voltage (SDA)
I = 3mA
l
0.4
V
I
IN
Input Leakage
0.1V
CC
≤ V
IN
≤ 0.9V
CC
l
1
µA
C
I
Capacitance for Each I/O Pin
l
10
pF
C
B
Capacitance Load for Each Bus Line
l
400
pF
V
IH(A0)
High Level Input Voltage for Address Pin
l
0.95V
CC
V
V
IL(A0)
Low Level Input Voltage for Address Pin
l
0.05V
CC
V
I
2
C INPUTS AND OUTPUTS
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. (Notes 2, 7)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
t
CONV
Conversion Time
l
13
16.6
23
ms
f
SCL
SCL Clock Frequency
l
0
400
kHz
t
HD(SDA,STA)
Hold Time (Repeated) START Condition
l
0.6
ms
t
LOW
LOW Period of the SCL Pin
l
1.3
ms
t
HIGH
HIGH Period of the SCL Pin
l
0.6
ms
t
SU(STA)
Set-Up Time for a Repeated START Condition
l
0.6
ms
t
HD(DAT)
Data Hold Time
l
0
0.9
ms
t
SU(DAT)
Data Set-Up Time
l
100
ns
t
r
Rise Time for SDA, SCL Signals
(Note 6)
l
20 + 0.1C
B
300
ns
t
f
Fall Time for SDA, SCL Signals
(Note 6)
l
20 + 0.1C
B
300
ns
t
SU(STO)
Set-Up Time for STOP Condition
l
0.6
ms
t
BUF
Bus Free Time Between a Stop and Start Condition
l
1.3
ms
t
OF
Output Fall Time V
IHMIN
to V
ILMAX
Bus Load C
B
= 10pF to
400pF (Note 6)
l
20 + 0.1C
B
250
ns
t
SP
Input Spike Suppression
l
50
ns
I
2
C TIMING CHARACTERISTICS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All voltage values are with respect to GND. V
Note 2: All voltage values are with respect to GND. V
CC
= 2.7V to 5.5V
unless otherwise specified.
Note 3: Guaranteed by design, not subject to test.
Note 4: Integral nonlinearity is defined as the deviation of a code from a
Note 3: Guaranteed by design, not subject to test.
Note 4: Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
Guaranteed by design and test correlation.
Note 5: Input sampling current is the average input current drawn from
the input sampling network while the LTC2461/LTC2463 are converting.
Note 6: C
Note 6: C
B
= capacitance of one bus line in pF.
Note 7: All values refer to V
IH(MIN
) and V
IL(MAX)
levels.
Note 8: A positive current is flowing into the DUT pin.
Note 9: Voltage temperature coefficient is calculated by dividing the
Note 9: Voltage temperature coefficient is calculated by dividing the
maximum change in output voltage by the specified temperature range.