Mikroelektronika MikroE Development Kits MIKROE-997 Data Sheet

Product codes
MIKROE-997
Page of 480
© 2009 Microchip Technology Inc.
 
DS39775C-page 347
PIC18F87J50 FAMILY
24.2
Voltage Reference Accuracy/Error
The full range of voltage reference cannot be realized
due to the construction of the module. The transistors
on the top and bottom of the resistor ladder network
(Figure 24-1) keep CV
REF
 from approaching the refer-
ence source rails. The voltage reference is derived
from the reference source; therefore, the CV
REF
 output
changes with fluctuations in that source. The tested
absolute accuracy of the voltage reference can be
found in Section 28.0 “Electrical Characteristics”.
24.3
Connection Considerations
The voltage reference module operates independently
of the comparator module. The output of the reference
generator may be connected to the RF5 pin if the
CVROE bit is set. Enabling the voltage reference out-
put onto RA2 when it is configured as a digital input will
increase current consumption. Connecting RF5 as a
digital output with CVRSS enabled will also increase
current consumption.
The RF5 pin can be used as a simple D/A output with
limited drive capability. Due to the limited current drive
capability, a buffer must be used on the voltage
reference output for external connections to V
REF
.
Figure 24-2 shows an example buffering technique.
24.4
Operation During Sleep
When the device wakes up from Sleep through an
interrupt or a Watchdog Timer time-out, the contents of
the CVRCON register are not affected. To minimize
current consumption in Sleep mode, the voltage
reference should be disabled.
24.5
Effects of a Reset
A device Reset disables the voltage reference by
clearing bit, CVREN (CVRCON<7>). This Reset also
disconnects the reference from the RA2 pin by clearing
bit, CVROE (CVRCON<6>) and selects the high-voltage
range by clearing bit, CVRR (CVRCON<5>). The CVR
value select bits are also cleared.
FIGURE 24-2:
COMPARATOR VOLTAGE REFERENCE OUTPUT BUFFER EXAMPLE      
TABLE 24-1:
REGISTERS ASSOCIATED WITH COMPARATOR VOLTAGE REFERENCE      
CV
REF
 Output
+
CV
REF
Module
Voltage 
Reference
Output 
Impedance
R
(1)
RF5
Note 1:
R is dependent upon the Comparator Voltage Reference Configuration bits, CVRCON<5> and CVRCON<3:0>.
PIC18F87J50
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reset 
Values 
on Page:
CVRCON
(1)
CVREN
CVROE
CVRR
CVRSS
CVR3
CVR2
CVR1
CVR0
CM1CON
CON
COE
CPOL
EVPOL1
EVPOL0
CREF
CCH1
CCH0
CM2CON
CON
COE
CPOL
EVPOL1
EVPOL0
CREF
CCH1
CCH0
TRISA
TRISA7
TRISA6
TRISA5
TRISA4
TRISA3
TRISA2
TRISA1
TRISA0
TRISF
TRISF7
TRISF6
TRISF5
TRISF4
TRISF3
TRISF2
ANCON0
(1)
PCFG7
PCFG4
PCFG3
PCFG2
PCFG1
PCFG0
ANCON1
(1)
PCFG15
PCFG14 PCFG13 PCFG12
PCFG11
PCFG10
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used with the comparator voltage reference.
Note 1:
Configuration SFR, overlaps with default SFR at this address; available only when WDTCON<4> = 1.