STMicroelectronics HVLED805 Evaluation Board EVALHVLED805 EVALHVLED805 Data Sheet
Product codes
EVALHVLED805
HVLED805
Application information
Doc ID 18077 Rev 1
17/29
Due to the parasitic wires resistance, the auxiliary voltage is representative of the output just
when the secondary current becomes zero. For this purpose, the signal on DMG pin is
sampled-and-held at the end of transformer’s demagnetization to get an accurate image of
the output voltage and it is compared with the error amplifier internal reference.
when the secondary current becomes zero. For this purpose, the signal on DMG pin is
sampled-and-held at the end of transformer’s demagnetization to get an accurate image of
the output voltage and it is compared with the error amplifier internal reference.
During the MOSFET’s OFF-time the leakage inductance resonates with the drain
capacitance and a damped oscillation is superimposed on the reflected voltage. The S/H
logic is able to discriminate such oscillations from the real transformer’s demagnetization.
capacitance and a damped oscillation is superimposed on the reflected voltage. The S/H
logic is able to discriminate such oscillations from the real transformer’s demagnetization.
When the DMG logic detects the transformer’s demagnetization, the sampling process
stops, the information is frozen and compared with the error amplifier internal reference.
stops, the information is frozen and compared with the error amplifier internal reference.
The internal error amplifier is a transconductance type and delivers an output current
proportional to the voltage unbalance of the two outputs: the output generates the control
voltage that is compared with the voltage across the sense resistor, thus modulating the
cycle-by-cycle peak drain current.
proportional to the voltage unbalance of the two outputs: the output generates the control
voltage that is compared with the voltage across the sense resistor, thus modulating the
cycle-by-cycle peak drain current.
The COMP pin is used for the frequency compensation: usually, an RC network, which
stabilizes the overall voltage control loop, is connected between this pin and ground.
stabilizes the overall voltage control loop, is connected between this pin and ground.
The output voltage can be defined according the formula:
Equation 1
Where n
SEC
and n
AUX
are the secondary and auxiliary turn’s number respectively.
The R
DMG
value can be defined depending on the application parameters (see “
” section).
Figure 14.
Voltage control principle: internal schematic
2.5V
Rdmg
From Rsense
Aux
+
-
EA
R
To PWM Logic
S/H
Rfb
DEMAG
LOGIC
+
-
CV
C
COMP
DMG
DMG
REF
OUT
SEC
AUX
REF
FB
R
V
V
n
n
V
R
⋅
−
⋅
=