Mikroelektronika MikroE Development Kits MIKROE-18 Data Sheet
Product codes
MIKROE-18
© 2008 Microchip Technology Inc.
DS39646C-page 3
PIC18F8722 FAMILY
Pin Diagrams (Continued)
PIC18F8527
3
4
5
6
7
8
9
10
11
12
13
14
15
16
48
47
46
45
45
44
43
42
41
40
39
64 63 62 61
21 22 23 24 25 26 27 28 29 30 31 32
RE2
/A
D
1
0
/CS
/P
2B
R
E
3/
A
D
1
1
/P
3C
(2
)
R
E
4
/A
D
12
/P
3B
(2
)
R
E
5
/A
D
13
/P
1C
(2
)
R
E
6
/A
D
14
/P
1B
(2
)
RE7
/A
D
1
5
/ECCP2
(1
)
/P
2
A
(1
)
RD0
/A
D0
/PSP0
V
DD
V
SS
RD1
/A
D1
/PSP1
RD2
/A
D2
/PSP2
RD3
/A
D3
/PSP3
RD4
/A
D4
/PSP4
/S
DO
2
RD5
/A
D5
/PSP5
/S
DI
2
/SDA2
RD6
/A
D6
/PSP6
/S
CK2
/SCL
2
RD7
/A
D7
/PSP7
/SS2
RE1/AD9/WR/P2C
RE0/AD8/RD/P2D
RG0/ECCP3/P3A
RG1/TX2/CK2
RG2/RX2/DT2
RG3/CCP4/P3D
RG5/MCLR/V
PP
RG4/CCP5/P1D
V
SS
V
DD
RF7/SS1
RB0/INT0
RB1/INT1
RB1/INT1
RB2/INT2
RB3/INT3/ECCP2
(1)
/P2A
(1)
RB4/KBI0
RB5/KBI1/PGM
RB6/KBI2/PGC
RB6/KBI2/PGC
V
SS
OSC2/CLKO/RA6
OSC1/CLKI/RA7
OSC1/CLKI/RA7
V
DD
RB7/KBI3/PGD
RC4/SDI1/SDA1
RC3/SCK1/SCL1
RC2/ECCP1/P1A
RC2/ECCP1/P1A
RF
0
/AN5
RF
1
/AN6
/C2
OUT
AV
DD
AV
SS
RA3
/AN3
/V
RE
F
+
RA2
/AN2
/V
RE
F
-
RA1
/AN1
RA0
/AN0
V
SS
V
DD
RA4
/T
0
CKI
RA5
/AN4
/HL
VDIN
RC1
/T
1
O
SI/ECCP2
(1
)
/P
2A
(1
)
R
C
0/T
1
OS
O
/T1
3C
K
I
RC7
/R
X1
/DT
1
RC6
/T
X
1
/CK
1
RC5/SDO1
RJ0
/AL
E
RJ1
/OE
RH1
/A1
7
RH
0
/A
1
6
1
2
RH2/A18
RH3/A19
RH3/A19
17
18
RH7/AN15/P1B
(2)
RH6/AN14/P1C
(2)
R
H
5/A
N
13
/P
3B
(2
)
RH4
/AN1
2
/P3
C
(2
)
RJ
5
/CE
RJ
4
/BA0
37
RJ7/UB
RJ6/LB
RJ6/LB
50
49
RJ2/WRL
RJ3/WRH
RJ3/WRH
19
20
33 34 35 36
38
58
57
56
55
55
54
53
52
51
60
59
68 67 66 65
72 71 70 69
74 73
78 77 76 75
79
80
80-Pin TQFP
Note 1:
The ECCP2/P2A pin placement is determined by the CCP2MX Configuration bit and Processor mode settings.
2:
P1B, P1C, P3B and P3C pin placement is determined by the ECCPMX Configuration bit.
RF5/AN10/CV
REF
RF4/AN9
RF3/AN8
RF2/AN7/C1OUT
RF6/AN11
PIC18F8622
PIC18F8627
PIC18F8722
PIC18F8627
PIC18F8722